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AIX library functions `frexpl()`, `ldexpl()`, and `modfl()` are for 128-bit
`long double`. Other `*l()` functions, e.g., `acosl()`, are for 64-bit `long
double`. The AIX Clang compiler currently maps builtin functions
`__builtin_frexpl()`, `__builtin_ldexpl()`, and `__builtin_modfl()` to
`frexpl()`, `ldexpl()`, and `modfl()` in 64-bit `long double` mode which
results in seg-faults or incorrect return values. This patch changes to map
`__builtin_frexpl()`, `__builtin_ldexpl()`, and `__builtin_modfl()` to `double`
version lib functions `frexp()`, `ldexp()` and `modf()` in 64-bit `long double`
mode. The following is from AIX <math.h>.
/*
* frexpl(), ldexpl(), and modfl() have preexisting shared versions which are
* 128-bit only. 64-bit versions must be made available for C99 for the
* default 64-bit long double. These cannot simply be macros because the
* actual routines will be the incorrect form in 64-bit mode if the user
* forces the actual routines to be used through undef or macro suppression
* per the standard.
*/
#if defined(_ISOC99_SOURCE) && !defined(__LONGDOUBLE128)
static long double _NOTHROW(frexpl, (long double __x, int *__i))
{
return (long double) frexp((double) __x, __i);
}
static long double _NOTHROW(ldexpl, (long double __x, int __i))
{
return (long double) ldexp((double) __x, __i);
}
#ifndef __MODFL
static long double _NOTHROW(modfl, (long double __x, long double *__y))
{
return (long double) modf((double) __x, (double *) __y);
}
#endif
#endif
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D137986
Files:
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/aix-builtin-mapping.c
Index: clang/test/CodeGen/aix-builtin-mapping.c
===================================================================
--- /dev/null
+++ clang/test/CodeGen/aix-builtin-mapping.c
@@ -0,0 +1,22 @@
+// AIX library functions frexpl, ldexpl, and modfl are for 128-bit
+// 'long double'. Check that the compiler generates calls to the 'double'
+// versions for correspoding builtin functions in 64-bit 'long double' mode.
+
+// RUN: %clang_cc1 -triple powerpc-ibm-aix -mlong-double-64 -S -o - %s |
FileCheck %s -check-prefix=CHECK
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix -mlong-double-64 -S -o - %s |
FileCheck %s -check-prefix=CHECK
+
+int main()
+{
+ int DummyInt;
+ long double DummyLongDouble;
+ long double returnValue;
+
+ returnValue = __builtin_modfl(1.0L, &DummyLongDouble);
+ returnValue = __builtin_frexpl(0.0L, &DummyInt);
+ returnValue = __builtin_ldexpl(1.0L, 1);
+}
+
+// CHECK: bl .modf[PR]
+// CHECK: bl .frexp[PR]
+// CHECK: bl .ldexp[PR]
+
Index: clang/lib/CodeGen/CGBuiltin.cpp
===================================================================
--- clang/lib/CodeGen/CGBuiltin.cpp
+++ clang/lib/CodeGen/CGBuiltin.cpp
@@ -106,6 +106,15 @@
{Builtin::BI__builtin_nexttowardf128, "__nexttowardieee128"},
};
+ // The AIX library functions frexpl, ldexpl, and modfl are for 128-bit
+ // 'long double'. Map to the 'double' versions if it is 64-bit 'long
+ // double' mode.
+ static SmallDenseMap<unsigned, StringRef, 4> AIXLongDoubleBuiltins{
+ {Builtin::BI__builtin_frexpl, "frexp"},
+ {Builtin::BI__builtin_ldexpl, "ldexp"},
+ {Builtin::BI__builtin_modfl, "modf"},
+ };
+
// If the builtin has been declared explicitly with an assembler label,
// use the mangled name. This differs from the plain label on platforms
// that prefix labels.
@@ -118,6 +127,12 @@
&getTarget().getLongDoubleFormat() == &llvm::APFloat::IEEEquad() &&
F128Builtins.find(BuiltinID) != F128Builtins.end())
Name = F128Builtins[BuiltinID];
+ else if (getTriple().isOSAIX() &&
+ &getTarget().getLongDoubleFormat() ==
+ &llvm::APFloat::IEEEdouble() &&
+ AIXLongDoubleBuiltins.find(BuiltinID) !=
+ AIXLongDoubleBuiltins.end())
+ Name = AIXLongDoubleBuiltins[BuiltinID];
else
Name = Context.BuiltinInfo.getName(BuiltinID) + 10;
}
Index: clang/test/CodeGen/aix-builtin-mapping.c
===================================================================
--- /dev/null
+++ clang/test/CodeGen/aix-builtin-mapping.c
@@ -0,0 +1,22 @@
+// AIX library functions frexpl, ldexpl, and modfl are for 128-bit
+// 'long double'. Check that the compiler generates calls to the 'double'
+// versions for correspoding builtin functions in 64-bit 'long double' mode.
+
+// RUN: %clang_cc1 -triple powerpc-ibm-aix -mlong-double-64 -S -o - %s | FileCheck %s -check-prefix=CHECK
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix -mlong-double-64 -S -o - %s | FileCheck %s -check-prefix=CHECK
+
+int main()
+{
+ int DummyInt;
+ long double DummyLongDouble;
+ long double returnValue;
+
+ returnValue = __builtin_modfl(1.0L, &DummyLongDouble);
+ returnValue = __builtin_frexpl(0.0L, &DummyInt);
+ returnValue = __builtin_ldexpl(1.0L, 1);
+}
+
+// CHECK: bl .modf[PR]
+// CHECK: bl .frexp[PR]
+// CHECK: bl .ldexp[PR]
+
Index: clang/lib/CodeGen/CGBuiltin.cpp
===================================================================
--- clang/lib/CodeGen/CGBuiltin.cpp
+++ clang/lib/CodeGen/CGBuiltin.cpp
@@ -106,6 +106,15 @@
{Builtin::BI__builtin_nexttowardf128, "__nexttowardieee128"},
};
+ // The AIX library functions frexpl, ldexpl, and modfl are for 128-bit
+ // 'long double'. Map to the 'double' versions if it is 64-bit 'long
+ // double' mode.
+ static SmallDenseMap<unsigned, StringRef, 4> AIXLongDoubleBuiltins{
+ {Builtin::BI__builtin_frexpl, "frexp"},
+ {Builtin::BI__builtin_ldexpl, "ldexp"},
+ {Builtin::BI__builtin_modfl, "modf"},
+ };
+
// If the builtin has been declared explicitly with an assembler label,
// use the mangled name. This differs from the plain label on platforms
// that prefix labels.
@@ -118,6 +127,12 @@
&getTarget().getLongDoubleFormat() == &llvm::APFloat::IEEEquad() &&
F128Builtins.find(BuiltinID) != F128Builtins.end())
Name = F128Builtins[BuiltinID];
+ else if (getTriple().isOSAIX() &&
+ &getTarget().getLongDoubleFormat() ==
+ &llvm::APFloat::IEEEdouble() &&
+ AIXLongDoubleBuiltins.find(BuiltinID) !=
+ AIXLongDoubleBuiltins.end())
+ Name = AIXLongDoubleBuiltins[BuiltinID];
else
Name = Context.BuiltinInfo.getName(BuiltinID) + 10;
}
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