craig.topper added inline comments.
================ Comment at: llvm/test/CodeGen/X86/avx512-gfni-intrinsics.ll:29 +; +; X86NOBW-LABEL: test_vgf2p8affineinvqb_128: +; X86NOBW: # %bb.0: ---------------- pengfei wrote: > Since we are able to lower the mask version intrinsics, we have 3 choices for > the FE support: > 1. Still disallow Clang intrinsics for AVX512F. This matches with GCC too; > 2. Allow the mask intrinsics as well. This matches with Intrinsic Guide and > SDM somehow; > 3. And mixed for AVX512F and AVX512BW as in this revision; > I slightly prefer to 1). I think the intention of the EVEX design is to use > the masked instructions directly, so it should always imply AVX512BW in > reality. But I'm fine with any way. I think gcc allows the 128-bit mask with avx512vl only. The 256 and 512 require avx512bw due to needing kmovd and kmovq to have a large enough mask register. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D137036/new/ https://reviews.llvm.org/D137036 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
