skan added inline comments.
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:28251
+ SDLoc DL(Op);
+ SDVTList VTs = DAG.getVTList(MVT::i32, MVT::Other);
+ SDValue Chain = Op.getOperand(0);
----------------
Unused?
================
Comment at: llvm/lib/Target/X86/X86InstrInfo.td:3024
+//
+let Predicates = [HasCMPCCXADD, In64BitMode], Defs = [EFLAGS],
+ Constraints = "$dstsrc2 = $dst" in {
----------------
Should we set isCodeGenOnly =1 here?
================
Comment at: llvm/utils/TableGen/X86RecognizableInstr.h:109
PrefixByte = 10,
+ MRMDestMem4VOp3CC = 18,
MRMr0 = 21,
----------------
Should we use 20 here?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D135933/new/
https://reviews.llvm.org/D135933
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
