craig.topper added a comment. Can the intrinsics changes be split from this patch so they don't depend on D136145 <https://reviews.llvm.org/D136145>. There's no reason to block assembler/disassembler support for that.
================ Comment at: clang/lib/Headers/prfchiintrin.h:16 +/// Loads an instruction sequence containing the specified memory address into +/// all level cache. +/// ---------------- It looks old that this indented differently than the "Loads" on the line above. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D136040/new/ https://reviews.llvm.org/D136040 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits