RKSimon added a comment.
A few minors - and this probably needs a release notes entry for 16.x?
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:2185
+ addRegisterClass(MVT::v32bf16, &X86::VR512RegClass);
+ setOperationAction(ISD::BUILD_VECTOR, MVT::bf16, Custom);
+ setOperationAction(ISD::BUILD_VECTOR, MVT::v8bf16, Custom);
----------------
Isn't MVT::bf16 scalar?
================
Comment at: llvm/test/CodeGen/X86/avx512bf16-intrinsics-upgrade.ll:30
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
-; X64-NEXT: vcvtne2ps2bf16 %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding:
[0x62,0xf2,0x7f,0xc9,0x72,0xc1]
+; X64-NEXT: vmovdqu16 %zmm0, %zmm0 {%k1} {z} # encoding:
[0x62,0xf1,0xff,0xc9,0x6f,0xc0]
; X64-NEXT: retq # encoding: [0xc3]
----------------
any chance we can recover the predicated instruction?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D132329/new/
https://reviews.llvm.org/D132329
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