nikic added inline comments.
================
Comment at: llvm/lib/IR/Constants.cpp:2368-2379
+bool ConstantExpr::isDesirableBinOp(unsigned Opcode) {
+ assert(Instruction::isBinaryOp(Opcode) && "Argument must be binop opcode");
+ switch (Opcode) {
+ case Instruction::UDiv:
+ case Instruction::SDiv:
+ case Instruction::URem:
+ case Instruction::SRem:
----------------
nhaehnle wrote:
> Is the plan to successively make more ops undesirable? Perhaps this should be
> a whitelist instead of a blacklist.
I went with the "Why don't we have both?" approach here and explicitly listed
both the desirable and undesirable binops. And yes, I plan to successively move
these until only add and sub are left in the bottom list.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D128820/new/
https://reviews.llvm.org/D128820
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
