efriedma added inline comments.
================ Comment at: llvm/test/CodeGen/Thumb/frame-access.ll:335 +; CHECK-FP-AAPCS: mov r1, r11 +; CHECK-FP-AAPCS: ldr r0, [r0, r1] +; CHECK: bl i ---------------- This sequence requires, in general, scavenging two registers. I'm not sure we can do that in general? I think we normally only have one emergency spill slot. Maybe we can save a register using add instead of mov; something like `ldr r0, .LCPI0_0; add r0, r11; ldr r0, [r0]`. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D125094/new/ https://reviews.llvm.org/D125094 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
