Author: Xiang1 Zhang Date: 2022-04-22T09:11:40+08:00 New Revision: caf5ad5da7c2d0dc7a2c2efecc26f4803d283d24
URL: https://github.com/llvm/llvm-project/commit/caf5ad5da7c2d0dc7a2c2efecc26f4803d283d24 DIFF: https://github.com/llvm/llvm-project/commit/caf5ad5da7c2d0dc7a2c2efecc26f4803d283d24.diff LOG: Revert "[x86] Support 3 builtin functions for 32-bits mode" This reverts commit a69c219a8c9f7eaff142b6b4d135ac0456e0d4ae. Added: Modified: clang/include/clang/Basic/BuiltinsX86.def clang/include/clang/Basic/BuiltinsX86_64.def clang/lib/Headers/emmintrin.h clang/lib/Headers/smmintrin.h clang/test/CodeGen/X86/sse2-builtins.c clang/test/CodeGen/X86/sse41-builtins.c Removed: ################################################################################ diff --git a/clang/include/clang/Basic/BuiltinsX86.def b/clang/include/clang/Basic/BuiltinsX86.def index 449acfbec5630..0dd7a4daa3021 100644 --- a/clang/include/clang/Basic/BuiltinsX86.def +++ b/clang/include/clang/Basic/BuiltinsX86.def @@ -261,7 +261,6 @@ TARGET_BUILTIN(__builtin_ia32_packsswb128, "V16cV8sV8s", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_packssdw128, "V8sV4iV4i", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_packuswb128, "V16cV8sV8s", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_pmulhuw128, "V8sV8sV8s", "ncV:128:", "sse2") -TARGET_BUILTIN(__builtin_ia32_vec_ext_v2di, "OiV2OiIi", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_vec_ext_v4si, "iV4iIi", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_vec_ext_v4sf, "fV4fIi", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_vec_ext_v8hi, "sV8sIi", "ncV:128:", "sse2") diff --git a/clang/include/clang/Basic/BuiltinsX86_64.def b/clang/include/clang/Basic/BuiltinsX86_64.def index 81cda3c5b94f2..c3b9703a9cc67 100644 --- a/clang/include/clang/Basic/BuiltinsX86_64.def +++ b/clang/include/clang/Basic/BuiltinsX86_64.def @@ -42,6 +42,7 @@ TARGET_BUILTIN(__builtin_ia32_cvttss2si64, "OiV4f", "ncV:128:", "sse") TARGET_BUILTIN(__builtin_ia32_cvtsd2si64, "OiV2d", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_cvttsd2si64, "OiV2d", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_movnti64, "vOi*Oi", "n", "sse2") +TARGET_BUILTIN(__builtin_ia32_vec_ext_v2di, "OiV2OiIi", "ncV:128:", "sse2") TARGET_BUILTIN(__builtin_ia32_vec_set_v2di, "V2OiV2OiOiIi", "ncV:128:", "sse4.1") TARGET_BUILTIN(__builtin_ia32_crc32di, "UOiUOiUOi", "nc", "crc32") TARGET_BUILTIN(__builtin_ia32_vec_ext_v4di, "OiV4OiIi", "ncV:256:", "avx") diff --git a/clang/lib/Headers/emmintrin.h b/clang/lib/Headers/emmintrin.h index 542a17e4b509d..942a0f788a8cd 100644 --- a/clang/lib/Headers/emmintrin.h +++ b/clang/lib/Headers/emmintrin.h @@ -3467,13 +3467,13 @@ _mm_cvtsi32_si128(int __a) return __extension__ (__m128i)(__v4si){ __a, 0, 0, 0 }; } +#ifdef __x86_64__ /// Returns a vector of [2 x i64] where the lower element is the input /// operand and the upper element is zero. /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction -/// in 64-bit mode. +/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction. /// /// \param __a /// A 64-bit signed integer operand containing the value to be converted. @@ -3483,6 +3483,7 @@ _mm_cvtsi64_si128(long long __a) { return __extension__ (__m128i)(__v2di){ __a, 0 }; } +#endif /// Moves the least significant 32 bits of a vector of [4 x i32] to a /// 32-bit signed integer value. @@ -3502,6 +3503,7 @@ _mm_cvtsi128_si32(__m128i __a) return __b[0]; } +#ifdef __x86_64__ /// Moves the least significant 64 bits of a vector of [2 x i64] to a /// 64-bit signed integer value. /// @@ -3518,6 +3520,7 @@ _mm_cvtsi128_si64(__m128i __a) { return __a[0]; } +#endif /// Moves packed integer values from an aligned 128-bit memory location /// to elements in a 128-bit integer vector. diff --git a/clang/lib/Headers/smmintrin.h b/clang/lib/Headers/smmintrin.h index eb630dfd6e59e..0df59c5fcc592 100644 --- a/clang/lib/Headers/smmintrin.h +++ b/clang/lib/Headers/smmintrin.h @@ -1061,6 +1061,7 @@ _mm_max_epu32 (__m128i __V1, __m128i __V2) #define _mm_extract_epi32(X, N) \ ((int)__builtin_ia32_vec_ext_v4si((__v4si)(__m128i)(X), (int)(N))) +#ifdef __x86_64__ /// Extracts a 64-bit element from the 128-bit integer vector of /// [2 x i64], using the immediate value parameter \a N as a selector. /// @@ -1070,8 +1071,7 @@ _mm_max_epu32 (__m128i __V1, __m128i __V2) /// long long _mm_extract_epi64(__m128i X, const int N); /// \endcode /// -/// This intrinsic corresponds to the <c> VPEXTRQ / PEXTRQ </c> instruction -/// in 64-bit mode. +/// This intrinsic corresponds to the <c> VPEXTRQ / PEXTRQ </c> instruction. /// /// \param X /// A 128-bit integer vector. @@ -1081,8 +1081,9 @@ _mm_max_epu32 (__m128i __V1, __m128i __V2) /// 0: Bits [63:0] are returned. \n /// 1: Bits [127:64] are returned. \n /// \returns A 64-bit integer. -#define _mm_extract_epi64(X, N) \ +#define _mm_extract_epi64(X, N) \ ((long long)__builtin_ia32_vec_ext_v2di((__v2di)(__m128i)(X), (int)(N))) +#endif /* __x86_64 */ /* SSE4 128-bit Packed Integer Comparisons. */ /// Tests whether the specified bits in a 128-bit integer vector are all diff --git a/clang/test/CodeGen/X86/sse2-builtins.c b/clang/test/CodeGen/X86/sse2-builtins.c index 34ca27db3972f..50a8443e2cc2d 100644 --- a/clang/test/CodeGen/X86/sse2-builtins.c +++ b/clang/test/CodeGen/X86/sse2-builtins.c @@ -510,11 +510,13 @@ int test_mm_cvtsi128_si32(__m128i A) { return _mm_cvtsi128_si32(A); } +#ifdef __x86_64__ long long test_mm_cvtsi128_si64(__m128i A) { - // CHECK-LABEL: test_mm_cvtsi128_si64 - // CHECK: extractelement <2 x i64> %{{.*}}, i32 0 + // X64-LABEL: test_mm_cvtsi128_si64 + // X64: extractelement <2 x i64> %{{.*}}, i32 0 return _mm_cvtsi128_si64(A); } +#endif __m128d test_mm_cvtsi32_sd(__m128d A, int B) { // CHECK-LABEL: test_mm_cvtsi32_sd @@ -539,14 +541,14 @@ __m128d test_mm_cvtsi64_sd(__m128d A, long long B) { // X64: insertelement <2 x double> %{{.*}}, double %{{.*}}, i32 0 return _mm_cvtsi64_sd(A, B); } -#endif __m128i test_mm_cvtsi64_si128(long long A) { - // CHECK-LABEL: test_mm_cvtsi64_si128 - // CHECK: insertelement <2 x i64> undef, i64 %{{.*}}, i32 0 - // CHECK: insertelement <2 x i64> %{{.*}}, i64 0, i32 1 + // X64-LABEL: test_mm_cvtsi64_si128 + // X64: insertelement <2 x i64> undef, i64 %{{.*}}, i32 0 + // X64: insertelement <2 x i64> %{{.*}}, i64 0, i32 1 return _mm_cvtsi64_si128(A); } +#endif __m128d test_mm_cvtss_sd(__m128d A, __m128 B) { // CHECK-LABEL: test_mm_cvtss_sd diff --git a/clang/test/CodeGen/X86/sse41-builtins.c b/clang/test/CodeGen/X86/sse41-builtins.c index 8907baf9394bc..c09380bbe1de9 100644 --- a/clang/test/CodeGen/X86/sse41-builtins.c +++ b/clang/test/CodeGen/X86/sse41-builtins.c @@ -184,11 +184,13 @@ int test_mm_extract_epi32(__m128i x) { return _mm_extract_epi32(x, 1); } +#ifdef __x86_64__ long long test_mm_extract_epi64(__m128i x) { - // CHECK-LABEL: test_mm_extract_epi64 - // CHECK: extractelement <2 x i64> %{{.*}}, {{i32|i64}} 1 + // X64-LABEL: test_mm_extract_epi64 + // X64: extractelement <2 x i64> %{{.*}}, {{i32|i64}} 1 return _mm_extract_epi64(x, 1); } +#endif int test_mm_extract_ps(__m128 x) { // CHECK-LABEL: test_mm_extract_ps _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
