khchen created this revision.
khchen added reviewers: craig.topper, rogfer01, frasercrmck, kito-cheng, 
arcbbb, monkchiang, eopXD.
Herald added subscribers: s, VincentWu, luke957, StephenFan, vkmr, evandro, 
luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, 
PkmX, the_o, brucehoult, MartinMosbeck, edward-jones, zzheng, jrtc27, niosHD, 
sabuasal, simoncook, johnrusso, rbar, asb, hiraditya, arichardson.
Herald added a project: All.
khchen requested review of this revision.
Herald added subscribers: llvm-commits, cfe-commits, pcwang-thead, MaskRay.
Herald added projects: clang, LLVM.

This reverts commit 10fd2822b77e12215b4ea82fc6d0a052961eb9d9 
<https://reviews.llvm.org/rG10fd2822b77e12215b4ea82fc6d0a052961eb9d9>.

I have a better implementation for those operations without the
additional policy operand.
masked compare and vmsbf/vmsif/vmsof are always tail agnostic so we could
assume undef maskedoff is mask agnostic.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D122455

Files:
  clang/include/clang/Basic/riscv_vector.td
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmsbf.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmsif.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vmsof.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vmsbf.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vmsif.c
  clang/test/CodeGen/RISCV/rvv-intrinsics/vmsof.c
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/test/CodeGen/RISCV/rvv/masked-tama.ll
  llvm/test/CodeGen/RISCV/rvv/masked-tamu.ll
  llvm/test/CodeGen/RISCV/rvv/masked-tuma.ll
  llvm/test/CodeGen/RISCV/rvv/masked-tumu.ll
  llvm/test/CodeGen/RISCV/rvv/vmfeq.ll
  llvm/test/CodeGen/RISCV/rvv/vmfge.ll
  llvm/test/CodeGen/RISCV/rvv/vmfgt.ll
  llvm/test/CodeGen/RISCV/rvv/vmfle.ll
  llvm/test/CodeGen/RISCV/rvv/vmflt.ll
  llvm/test/CodeGen/RISCV/rvv/vmfne.ll
  llvm/test/CodeGen/RISCV/rvv/vmsbf.ll
  llvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmseq-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmsge-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmsge-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmsgt-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmsif.ll
  llvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmsle-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmsleu-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmslt-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmslt-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmsltu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmsltu-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmsne-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmsof.ll

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