Author: Matthew Voss Date: 2022-02-17T14:32:10-08:00 New Revision: 9ce09099bba4be68d2a269b0bfd2b1dcc67f02d4
URL: https://github.com/llvm/llvm-project/commit/9ce09099bba4be68d2a269b0bfd2b1dcc67f02d4 DIFF: https://github.com/llvm/llvm-project/commit/9ce09099bba4be68d2a269b0bfd2b1dcc67f02d4.diff LOG: Revert "[CUDA][SPIRV] Assign global address space to CUDA kernel arguments" This reverts commit 9de4fc0f2d3b60542956f7e5254951d049edeb1f. Reverting due to test failure: https://lab.llvm.org/buildbot/#/builders/139/builds/17199 Added: Modified: clang/lib/Basic/Targets/SPIR.h clang/lib/CodeGen/TargetInfo.cpp Removed: clang/test/CodeGenCUDASPIRV/kernel-argument.cu ################################################################################ diff --git a/clang/lib/Basic/Targets/SPIR.h b/clang/lib/Basic/Targets/SPIR.h index 08c49f018ac79..a40d4b3ca27e1 100644 --- a/clang/lib/Basic/Targets/SPIR.h +++ b/clang/lib/Basic/Targets/SPIR.h @@ -144,16 +144,16 @@ class LLVM_LIBRARY_VISIBILITY BaseSPIRTargetInfo : public TargetInfo { // FIXME: SYCL specification considers unannotated pointers and references // to be pointing to the generic address space. See section 5.9.3 of // SYCL 2020 specification. - // Currently, there is no way of representing SYCL's and HIP/CUDA's default + // Currently, there is no way of representing SYCL's and HIP's default // address space language semantic along with the semantics of embedded C's // default address space in the same address space map. Hence the map needs // to be reset to allow mapping to the desired value of 'Default' entry for - // SYCL and HIP/CUDA. + // SYCL and HIP. setAddressSpaceMap( /*DefaultIsGeneric=*/Opts.SYCLIsDevice || - // The address mapping from HIP/CUDA language for device code is only - // defined for SPIR-V. - (getTriple().isSPIRV() && Opts.CUDAIsDevice)); + // The address mapping from HIP language for device code is only defined + // for SPIR-V. + (getTriple().isSPIRV() && Opts.HIP && Opts.CUDAIsDevice)); } void setSupportedOpenCLOpts() override { diff --git a/clang/lib/CodeGen/TargetInfo.cpp b/clang/lib/CodeGen/TargetInfo.cpp index 5a2991dfe1762..3e1df744b2ad7 100644 --- a/clang/lib/CodeGen/TargetInfo.cpp +++ b/clang/lib/CodeGen/TargetInfo.cpp @@ -10320,10 +10320,10 @@ void CommonSPIRABIInfo::setCCs() { } ABIArgInfo SPIRVABIInfo::classifyKernelArgumentType(QualType Ty) const { - if (getContext().getLangOpts().CUDAIsDevice) { + if (getContext().getLangOpts().HIP) { // Coerce pointer arguments with default address space to CrossWorkGroup - // pointers for HIPSPV/CUDASPV. When the language mode is HIP/CUDA, the - // SPIRTargetInfo maps cuda_device to SPIR-V's CrossWorkGroup address space. + // pointers for HIPSPV. When the language mode is HIP, the SPIRTargetInfo + // maps cuda_device to SPIR-V's CrossWorkGroup address space. llvm::Type *LTy = CGT.ConvertType(Ty); auto DefaultAS = getContext().getTargetAddressSpace(LangAS::Default); auto GlobalAS = getContext().getTargetAddressSpace(LangAS::cuda_device); diff --git a/clang/test/CodeGenCUDASPIRV/kernel-argument.cu b/clang/test/CodeGenCUDASPIRV/kernel-argument.cu deleted file mode 100644 index 0ccacffd12a5f..0000000000000 --- a/clang/test/CodeGenCUDASPIRV/kernel-argument.cu +++ /dev/null @@ -1,17 +0,0 @@ -// Tests CUDA kernel arguments get global address space when targetting SPIR-V. - -// REQUIRES: clang-driver - -// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv32 \ -// RUN: -nocudalib -nocudainc %s -o %t.bc -c 2>&1 -// RUN: llvm-dis %t.bc -o %t.ll -// RUN: FileCheck %s --input-file=%t.ll - -// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv64 \ -// RUN: -nocudalib -nocudainc %s -o %t.bc -c 2>&1 -// RUN: llvm-dis %t.bc -o %t.ll -// RUN: FileCheck %s --input-file=%t.ll - -// CHECK: define spir_kernel void @_Z6kernelPi(i32 addrspace(1)* noundef %output.coerce) - -__attribute__((global)) void kernel(int* output) { *output = 1; } _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
