[PATCH] D117854: [RISCV] Decouple Zve* extensions and the V extension.

[Craig Topper via Phabricator via cfe-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVSubtarget.h:185
+  bool hasVInstructionsF16() const {
+    return HasStdExtV || (HasStdExtZve32f && HasStdExtZfh);
+  }
----------------
This should be `(HasStdExtV || HasStdExtZve32f) && HasStdExtZfh`. V does mean 
f16 vectors are enabled.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117854/new/

https://reviews.llvm.org/D117854

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