dmgreen added inline comments.
================
Comment at: llvm/include/llvm/Support/AArch64TargetParser.def:205
+AARCH64_CPU_NAME("cortex-x1c", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
+ (AArch64::AEK_RAS))
AARCH64_CPU_NAME("cortex-x2", ARMV9A, FK_NEON_FP_ARMV8, false,
----------------
Should this have the same features as the cortex-x1? AEK_DOTPROD and AEK_FP16
and the rest?
================
Comment at: llvm/lib/Target/AArch64/AArch64.td:719
+ "Cortex-X1C ARM processors", [
+ FeatureFuseAES,
+ FeaturePostRAScheduler]>;
----------------
This can be the same as TuneX1. It might be worth using the same TuneX1 in both
the cortex-x1 and cortex-x1c.
================
Comment at: llvm/lib/Target/AArch64/AArch64.td:983
+ FeatureNEON, FeaturePerfMon, FeatureSPE,
+ FeaturePAuth, FeatureFullFP16,
FeatureFP16FML];
list<SubtargetFeature> X2 = [HasV9_0aOps, FeatureNEON, FeaturePerfMon,
----------------
Should this have dotprod and RCPC?
The TRM isn't super clear on what features are present. Is FP16FML present?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D117202/new/
https://reviews.llvm.org/D117202
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