[PATCH] D117131: [RISCV] Update recently ratified Zb{a,b,c,s} extensions to no longer be experimental

[Alex Bradbury via Phabricator via cfe-commits]

asb created this revision.
asb added reviewers: craig.topper, luismarques.
Herald added subscribers: VincentWu, luke957, achieveartificialintelligence, 
StephenFan, vkmr, frasercrmck, jdoerfert, evandro, apazos, sameer.abuasal, 
s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, 
rogfer01, edward-jones, zzheng, jrtc27, kito-cheng, niosHD, sabuasal, 
simoncook, johnrusso, rbar, hiraditya.
asb requested review of this revision.
Herald added subscribers: cfe-commits, MaskRay.
Herald added projects: clang, LLVM.

Agreed policy is that RISC-V extensions that have not yet been ratified should 
be marked as experimental, and enabling them requires the use of the 
-menable-experimental-extensions flag when using clang alongside the version 
number. These extensions have now been ratified, so this is no longer 
necessary, and the target feature names can be renamed to no longer be prefixed 
with "experimental-".


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D117131

Files:
  clang/include/clang/Basic/BuiltinsRISCV.def
  clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb-error.c
  clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb.c
  clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbc.c
  clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbb.c
  clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbc.c
  clang/test/Driver/riscv-arch.c
  clang/test/Preprocessor/riscv-target-features.c
  llvm/lib/Support/RISCVISAInfo.cpp
  llvm/lib/Target/RISCV/RISCV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
  llvm/test/CodeGen/RISCV/addimm-mulimm.ll
  llvm/test/CodeGen/RISCV/attributes.ll
  llvm/test/CodeGen/RISCV/div-by-constant.ll
  llvm/test/CodeGen/RISCV/imm.ll
  llvm/test/CodeGen/RISCV/rv32zba.ll
  llvm/test/CodeGen/RISCV/rv32zbb-intrinsic.ll
  llvm/test/CodeGen/RISCV/rv32zbb-zbp.ll
  llvm/test/CodeGen/RISCV/rv32zbb.ll
  llvm/test/CodeGen/RISCV/rv32zbc-intrinsic.ll
  llvm/test/CodeGen/RISCV/rv32zbs.ll
  llvm/test/CodeGen/RISCV/rv64i-exhaustive-w-insts.ll
  llvm/test/CodeGen/RISCV/rv64zba.ll
  llvm/test/CodeGen/RISCV/rv64zbb-intrinsic.ll
  llvm/test/CodeGen/RISCV/rv64zbb-zbp.ll
  llvm/test/CodeGen/RISCV/rv64zbb.ll
  llvm/test/CodeGen/RISCV/rv64zbc-intrinsic.ll
  llvm/test/CodeGen/RISCV/rv64zbs.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-store-merge-crash.ll
  llvm/test/CodeGen/RISCV/sadd_sat.ll
  llvm/test/CodeGen/RISCV/sadd_sat_plus.ll
  llvm/test/CodeGen/RISCV/selectcc-to-shiftand.ll
  llvm/test/CodeGen/RISCV/sextw-removal.ll
  llvm/test/CodeGen/RISCV/ssub_sat.ll
  llvm/test/CodeGen/RISCV/ssub_sat_plus.ll
  llvm/test/CodeGen/RISCV/uadd_sat.ll
  llvm/test/CodeGen/RISCV/uadd_sat_plus.ll
  llvm/test/CodeGen/RISCV/unfold-masked-merge-scalar-variablemask.ll
  llvm/test/CodeGen/RISCV/usub_sat.ll
  llvm/test/CodeGen/RISCV/usub_sat_plus.ll
  llvm/test/CodeGen/RISCV/xaluo.ll
  llvm/test/MC/RISCV/attribute-arch-invalid.s
  llvm/test/MC/RISCV/rv32zba-invalid.s
  llvm/test/MC/RISCV/rv32zba-valid.s
  llvm/test/MC/RISCV/rv32zbb-aliases-valid.s
  llvm/test/MC/RISCV/rv32zbb-invalid.s
  llvm/test/MC/RISCV/rv32zbb-valid.s
  llvm/test/MC/RISCV/rv32zbbp-invalid.s
  llvm/test/MC/RISCV/rv32zbbp-only-valid.s
  llvm/test/MC/RISCV/rv32zbbp-valid.s
  llvm/test/MC/RISCV/rv32zbc-invalid.s
  llvm/test/MC/RISCV/rv32zbc-valid.s
  llvm/test/MC/RISCV/rv32zbs-aliases-valid.s
  llvm/test/MC/RISCV/rv32zbs-invalid.s
  llvm/test/MC/RISCV/rv32zbs-valid.s
  llvm/test/MC/RISCV/rv64zba-aliases-valid.s
  llvm/test/MC/RISCV/rv64zba-invalid.s
  llvm/test/MC/RISCV/rv64zba-valid.s
  llvm/test/MC/RISCV/rv64zbb-aliases-valid.s
  llvm/test/MC/RISCV/rv64zbb-invalid.s
  llvm/test/MC/RISCV/rv64zbb-valid.s
  llvm/test/MC/RISCV/rv64zbbp-invalid.s
  llvm/test/MC/RISCV/rv64zbbp-valid.s
  llvm/test/MC/RISCV/rv64zbs-aliases-valid.s
  llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll
  llvm/test/Transforms/LoopIdiom/RISCV/popcnt.ll


Index: llvm/test/Transforms/LoopIdiom/RISCV/popcnt.ll
===================================================================
--- llvm/test/Transforms/LoopIdiom/RISCV/popcnt.ll
+++ llvm/test/Transforms/LoopIdiom/RISCV/popcnt.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -loop-idiom -mtriple=riscv32 -mattr=+experimental-zbb -S < %s | FileCheck %s --check-prefixes=CPOP
-; RUN: opt -loop-idiom -mtriple=riscv64 -mattr=+experimental-zbb -S < %s | FileCheck %s --check-prefixes=CPOP
+; RUN: opt -loop-idiom -mtriple=riscv32 -mattr=+zbb -S < %s | FileCheck %s --check-prefixes=CPOP
+; RUN: opt -loop-idiom -mtriple=riscv64 -mattr=+zbb -S < %s | FileCheck %s --check-prefixes=CPOP
 ; RUN: opt -loop-idiom -mtriple=riscv32 -S < %s | FileCheck %s --check-prefixes=NOCPOP
 ; RUN: opt -loop-idiom -mtriple=riscv64 -S < %s | FileCheck %s --check-prefixes=NOCPOP
 
Index: llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll
===================================================================
--- llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll
+++ llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll
@@ -47,7 +47,7 @@
 }
 
 ; Check that we don't hoist zext.h with 65535 with Zbb.
-define i32 @test6(i32 %a) nounwind "target-features"="+experimental-zbb" {
+define i32 @test6(i32 %a) nounwind "target-features"="+zbb" {
 ; CHECK-LABEL: test6
 ; CHECK: and i32 %a, 65535
   %1 = and i32 %a, 65535
@@ -65,7 +65,7 @@
 }
 
 ; Check that we don't hoist zext.w with Zba.
-define i64 @test8(i64 %a) nounwind "target-features"="+experimental-zbb" {
+define i64 @test8(i64 %a) nounwind "target-features"="+zbb" {
 ; CHECK-LABEL: test8
 ; CHECK: and i64 %a, 4294967295
   %1 = and i64 %a, 4294967295
Index: llvm/test/MC/RISCV/rv64zbs-aliases-valid.s
===================================================================
--- llvm/test/MC/RISCV/rv64zbs-aliases-valid.s
+++ llvm/test/MC/RISCV/rv64zbs-aliases-valid.s
@@ -1,12 +1,12 @@
-# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbs -riscv-no-aliases \
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+zbs -riscv-no-aliases \
 # RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s
-# RUN: llvm-mc %s  -triple=riscv64 -mattr=+experimental-zbs \
+# RUN: llvm-mc %s  -triple=riscv64 -mattr=+zbs \
 # RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+experimental-zbs < %s \
-# RUN:     | llvm-objdump -d -r -M no-aliases --mattr=+experimental-zbs - \
+# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+zbs < %s \
+# RUN:     | llvm-objdump -d -r -M no-aliases --mattr=+zbs - \
 # RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s
-# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+experimental-zbs < %s \
-# RUN:     | llvm-objdump -d -r --mattr=+experimental-zbs - \
+# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+zbs < %s \
+# RUN:     | llvm-objdump -d -r --mattr=+zbs - \
 # RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ %s
 
 # The following check prefixes are used in this test:
Index: llvm/test/MC/RISCV/rv64zbbp-valid.s
===================================================================
--- llvm/test/MC/RISCV/rv64zbbp-valid.s
+++ llvm/test/MC/RISCV/rv64zbbp-valid.s
@@ -1,8 +1,8 @@
 # With Bitmanip base extension:
-# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbb -show-encoding \
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+zbb -show-encoding \
 # RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zbb < %s \
-# RUN:     | llvm-objdump --mattr=+experimental-zbb -d -r - \
+# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zbb < %s \
+# RUN:     | llvm-objdump --mattr=+zbb -d -r - \
 # RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
 
 # With Bitmanip permutation extension:
Index: llvm/test/MC/RISCV/rv64zbbp-invalid.s
===================================================================
--- llvm/test/MC/RISCV/rv64zbbp-invalid.s
+++ llvm/test/MC/RISCV/rv64zbbp-invalid.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-b,experimental-zbb,experimental-zbp < %s 2>&1 | FileCheck %s
+# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-b,zbb,experimental-zbp < %s 2>&1 | FileCheck %s
 
 # Too few operands
 rolw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
Index: llvm/test/MC/RISCV/rv64zbb-valid.s
===================================================================
--- llvm/test/MC/RISCV/rv64zbb-valid.s
+++ llvm/test/MC/RISCV/rv64zbb-valid.s
@@ -1,8 +1,8 @@
 # With Bitmanip base extension:
-# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbb -riscv-no-aliases -show-encoding \
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+zbb -riscv-no-aliases -show-encoding \
 # RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zbb < %s \
-# RUN:     | llvm-objdump --mattr=+experimental-zbb -M no-aliases -d -r - \
+# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zbb < %s \
+# RUN:     | llvm-objdump --mattr=+zbb -M no-aliases -d -r - \
 # RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
 
 # CHECK-ASM-AND-OBJ: clzw t0, t1
Index: llvm/test/MC/RISCV/rv64zbb-invalid.s
===================================================================
--- llvm/test/MC/RISCV/rv64zbb-invalid.s
+++ llvm/test/MC/RISCV/rv64zbb-invalid.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-b,experimental-zbb < %s 2>&1 | FileCheck %s
+# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-b,zbb < %s 2>&1 | FileCheck %s
 
 # Too many operands
 clzw t0, t1, t2 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
Index: llvm/test/MC/RISCV/rv64zbb-aliases-valid.s
===================================================================
--- llvm/test/MC/RISCV/rv64zbb-aliases-valid.s
+++ llvm/test/MC/RISCV/rv64zbb-aliases-valid.s
@@ -1,12 +1,12 @@
-# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbb -riscv-no-aliases \
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+zbb -riscv-no-aliases \
 # RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s
-# RUN: llvm-mc %s  -triple=riscv64 -mattr=+experimental-zbb \
+# RUN: llvm-mc %s  -triple=riscv64 -mattr=+zbb \
 # RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+experimental-zbb < %s \
-# RUN:     | llvm-objdump -d -r -M no-aliases --mattr=+experimental-zbb - \
+# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+zbb < %s \
+# RUN:     | llvm-objdump -d -r -M no-aliases --mattr=+zbb - \
 # RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s
-# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+experimental-zbb < %s \
-# RUN:     | llvm-objdump -d -r --mattr=+experimental-zbb - \
+# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+zbb < %s \
+# RUN:     | llvm-objdump -d -r --mattr=+zbb - \
 # RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ %s
 
 # The following check prefixes are used in this test:
Index: llvm/test/MC/RISCV/rv64zba-valid.s
===================================================================
--- llvm/test/MC/RISCV/rv64zba-valid.s
+++ llvm/test/MC/RISCV/rv64zba-valid.s
@@ -1,8 +1,8 @@
 # With Bitmanip base extension:
-# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zba -show-encoding \
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+zba -show-encoding \
 # RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zba < %s \
-# RUN:     | llvm-objdump --mattr=+experimental-zba -d -r - \
+# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zba < %s \
+# RUN:     | llvm-objdump --mattr=+zba -d -r - \
 # RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
 
 # CHECK-ASM-AND-OBJ: slli.uw t0, t1, 0
Index: llvm/test/MC/RISCV/rv64zba-invalid.s
===================================================================
--- llvm/test/MC/RISCV/rv64zba-invalid.s
+++ llvm/test/MC/RISCV/rv64zba-invalid.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-b,experimental-zba < %s 2>&1 | FileCheck %s
+# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-b,zba < %s 2>&1 | FileCheck %s
 
 # Too few operands
 slli.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
Index: llvm/test/MC/RISCV/rv64zba-aliases-valid.s
===================================================================
--- llvm/test/MC/RISCV/rv64zba-aliases-valid.s
+++ llvm/test/MC/RISCV/rv64zba-aliases-valid.s
@@ -1,12 +1,12 @@
-# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zba -riscv-no-aliases \
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+zba -riscv-no-aliases \
 # RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s
-# RUN: llvm-mc %s  -triple=riscv64 -mattr=+experimental-zba \
+# RUN: llvm-mc %s  -triple=riscv64 -mattr=+zba \
 # RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+experimental-zba < %s \
-# RUN:     | llvm-objdump -d -r -M no-aliases --mattr=+experimental-zba - \
+# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+zba < %s \
+# RUN:     | llvm-objdump -d -r -M no-aliases --mattr=+zba - \
 # RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s
-# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+experimental-zba < %s \
-# RUN:     | llvm-objdump -d -r --mattr=+experimental-zba - \
+# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+zba < %s \
+# RUN:     | llvm-objdump -d -r --mattr=+zba - \
 # RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ %s
 
 # The following check prefixes are used in this test:
Index: llvm/test/MC/RISCV/rv32zbs-valid.s
===================================================================
--- llvm/test/MC/RISCV/rv32zbs-valid.s
+++ llvm/test/MC/RISCV/rv32zbs-valid.s
@@ -1,13 +1,13 @@
 # With Bitmanip single bit extension:
-# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zbs -show-encoding \
+# RUN: llvm-mc %s -triple=riscv32 -mattr=+zbs -show-encoding \
 # RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbs -show-encoding \
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+zbs -show-encoding \
 # RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zbs < %s \
-# RUN:     | llvm-objdump --mattr=+experimental-zbs -d -r - \
+# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+zbs < %s \
+# RUN:     | llvm-objdump --mattr=+zbs -d -r - \
 # RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zbs < %s \
-# RUN:     | llvm-objdump --mattr=+experimental-zbs -d -r - \
+# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zbs < %s \
+# RUN:     | llvm-objdump --mattr=+zbs -d -r - \
 # RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
 
 # CHECK-ASM-AND-OBJ: bclr t0, t1, t2
Index: llvm/test/MC/RISCV/rv32zbs-invalid.s
===================================================================
--- llvm/test/MC/RISCV/rv32zbs-invalid.s
+++ llvm/test/MC/RISCV/rv32zbs-invalid.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-b,experimental-zbs < %s 2>&1 | FileCheck %s
+# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-b,zbs < %s 2>&1 | FileCheck %s
 
 # Too few operands
 bclr t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
Index: llvm/test/MC/RISCV/rv32zbs-aliases-valid.s
===================================================================
--- llvm/test/MC/RISCV/rv32zbs-aliases-valid.s
+++ llvm/test/MC/RISCV/rv32zbs-aliases-valid.s
@@ -1,12 +1,12 @@
-# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zbs -riscv-no-aliases \
+# RUN: llvm-mc %s -triple=riscv32 -mattr=+zbs -riscv-no-aliases \
 # RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s
-# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zbs \
+# RUN: llvm-mc %s -triple=riscv32 -mattr=+zbs \
 # RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-zbs < %s \
-# RUN:     | llvm-objdump -d -r -M no-aliases --mattr=+experimental-zbs - \
+# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+zbs < %s \
+# RUN:     | llvm-objdump -d -r -M no-aliases --mattr=+zbs - \
 # RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s
-# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-zbs < %s \
-# RUN:     | llvm-objdump -d -r --mattr=+experimental-zbs - \
+# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+zbs < %s \
+# RUN:     | llvm-objdump -d -r --mattr=+zbs - \
 # RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ %s
 
 # The following check prefixes are used in this test:
Index: llvm/test/MC/RISCV/rv32zbc-valid.s
===================================================================
--- llvm/test/MC/RISCV/rv32zbc-valid.s
+++ llvm/test/MC/RISCV/rv32zbc-valid.s
@@ -1,13 +1,13 @@
 # With Bitmanip carry-less multiply extension:
-# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zbc -show-encoding \
+# RUN: llvm-mc %s -triple=riscv32 -mattr=+zbc -show-encoding \
 # RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbc -show-encoding \
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+zbc -show-encoding \
 # RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zbc < %s \
-# RUN:     | llvm-objdump --mattr=+experimental-zbc -d -r - \
+# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+zbc < %s \
+# RUN:     | llvm-objdump --mattr=+zbc -d -r - \
 # RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zbc < %s \
-# RUN:     | llvm-objdump --mattr=+experimental-zbc -d -r - \
+# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zbc < %s \
+# RUN:     | llvm-objdump --mattr=+zbc -d -r - \
 # RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
 
 # CHECK-ASM-AND-OBJ: clmul t0, t1, t2
Index: llvm/test/MC/RISCV/rv32zbc-invalid.s
===================================================================
--- llvm/test/MC/RISCV/rv32zbc-invalid.s
+++ llvm/test/MC/RISCV/rv32zbc-invalid.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-b,experimental-zbc < %s 2>&1 | FileCheck %s
+# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-b,zbc < %s 2>&1 | FileCheck %s
 
 # Too few operands
 clmul t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
Index: llvm/test/MC/RISCV/rv32zbbp-valid.s
===================================================================
--- llvm/test/MC/RISCV/rv32zbbp-valid.s
+++ llvm/test/MC/RISCV/rv32zbbp-valid.s
@@ -1,13 +1,13 @@
 # With Bitmanip base extension:
-# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zbb -show-encoding \
+# RUN: llvm-mc %s -triple=riscv32 -mattr=+zbb -show-encoding \
 # RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbb -show-encoding \
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+zbb -show-encoding \
 # RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zbb < %s \
-# RUN:     | llvm-objdump --mattr=+experimental-zbb -d -r - \
+# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+zbb < %s \
+# RUN:     | llvm-objdump --mattr=+zbb -d -r - \
 # RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zbb < %s \
-# RUN:     | llvm-objdump --mattr=+experimental-zbb -d -r - \
+# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zbb < %s \
+# RUN:     | llvm-objdump --mattr=+zbb -d -r - \
 # RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
 
 # With Bitmanip permutation extension:
Index: llvm/test/MC/RISCV/rv32zbbp-only-valid.s
===================================================================
--- llvm/test/MC/RISCV/rv32zbbp-only-valid.s
+++ llvm/test/MC/RISCV/rv32zbbp-only-valid.s
@@ -1,8 +1,8 @@
 # With Bitmanip base extension:
-# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zbb -riscv-no-aliases -show-encoding \
+# RUN: llvm-mc %s -triple=riscv32 -mattr=+zbb -riscv-no-aliases -show-encoding \
 # RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zbb < %s \
-# RUN:     | llvm-objdump --mattr=+experimental-zbb -M no-aliases -d -r - \
+# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+zbb < %s \
+# RUN:     | llvm-objdump --mattr=+zbb -M no-aliases -d -r - \
 # RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
 
 # With Bitmanip permutation extension:
Index: llvm/test/MC/RISCV/rv32zbbp-invalid.s
===================================================================
--- llvm/test/MC/RISCV/rv32zbbp-invalid.s
+++ llvm/test/MC/RISCV/rv32zbbp-invalid.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-b,experimental-zbb,experimental-zbp < %s 2>&1 | FileCheck %s
+# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-b,zbb,experimental-zbp < %s 2>&1 | FileCheck %s
 
 # Too few operands
 andn t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
Index: llvm/test/MC/RISCV/rv32zbb-valid.s
===================================================================
--- llvm/test/MC/RISCV/rv32zbb-valid.s
+++ llvm/test/MC/RISCV/rv32zbb-valid.s
@@ -1,13 +1,13 @@
 # With Bitmanip base extension:
-# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zbb -riscv-no-aliases -show-encoding \
+# RUN: llvm-mc %s -triple=riscv32 -mattr=+zbb -riscv-no-aliases -show-encoding \
 # RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zbb -riscv-no-aliases -show-encoding \
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+zbb -riscv-no-aliases -show-encoding \
 # RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zbb < %s \
-# RUN:     | llvm-objdump --mattr=+experimental-zbb -M no-aliases -d -r - \
+# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+zbb < %s \
+# RUN:     | llvm-objdump --mattr=+zbb -M no-aliases -d -r - \
 # RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zbb < %s \
-# RUN:     | llvm-objdump --mattr=+experimental-zbb -M no-aliases -d -r - \
+# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zbb < %s \
+# RUN:     | llvm-objdump --mattr=+zbb -M no-aliases -d -r - \
 # RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
 
 # CHECK-ASM-AND-OBJ: clz t0, t1
Index: llvm/test/MC/RISCV/rv32zbb-invalid.s
===================================================================
--- llvm/test/MC/RISCV/rv32zbb-invalid.s
+++ llvm/test/MC/RISCV/rv32zbb-invalid.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-b,experimental-zbb < %s 2>&1 | FileCheck %s
+# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-b,zbb < %s 2>&1 | FileCheck %s
 
 # Too many operands
 clz t0, t1, t2 # CHECK: :[[@LINE]]:13: error: invalid operand for instruction
Index: llvm/test/MC/RISCV/rv32zbb-aliases-valid.s
===================================================================
--- llvm/test/MC/RISCV/rv32zbb-aliases-valid.s
+++ llvm/test/MC/RISCV/rv32zbb-aliases-valid.s
@@ -1,12 +1,12 @@
-# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zbb -riscv-no-aliases \
+# RUN: llvm-mc %s -triple=riscv32 -mattr=+zbb -riscv-no-aliases \
 # RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s
-# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zbb \
+# RUN: llvm-mc %s -triple=riscv32 -mattr=+zbb \
 # RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-zbb < %s \
-# RUN:     | llvm-objdump -d -r -M no-aliases --mattr=+experimental-zbb - \
+# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+zbb < %s \
+# RUN:     | llvm-objdump -d -r -M no-aliases --mattr=+zbb - \
 # RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ-NOALIAS %s
-# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-zbb < %s \
-# RUN:     | llvm-objdump -d -r --mattr=+experimental-zbb - \
+# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+zbb < %s \
+# RUN:     | llvm-objdump -d -r --mattr=+zbb - \
 # RUN:     | FileCheck -check-prefixes=CHECK-S-OBJ %s
 
 # The following check prefixes are used in this test:
Index: llvm/test/MC/RISCV/rv32zba-valid.s
===================================================================
--- llvm/test/MC/RISCV/rv32zba-valid.s
+++ llvm/test/MC/RISCV/rv32zba-valid.s
@@ -1,13 +1,13 @@
 # With Bitmanip base extension:
-# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zba -show-encoding \
+# RUN: llvm-mc %s -triple=riscv32 -mattr=+zba -show-encoding \
 # RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zba -show-encoding \
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+zba -show-encoding \
 # RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zba < %s \
-# RUN:     | llvm-objdump --mattr=+experimental-zba -d -r - \
+# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+zba < %s \
+# RUN:     | llvm-objdump --mattr=+zba -d -r - \
 # RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zba < %s \
-# RUN:     | llvm-objdump --mattr=+experimental-zba -d -r - \
+# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zba < %s \
+# RUN:     | llvm-objdump --mattr=+zba -d -r - \
 # RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
 
 # CHECK-ASM-AND-OBJ: sh1add t0, t1, t2
Index: llvm/test/MC/RISCV/rv32zba-invalid.s
===================================================================
--- llvm/test/MC/RISCV/rv32zba-invalid.s
+++ llvm/test/MC/RISCV/rv32zba-invalid.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-b,experimental-zba < %s 2>&1 | FileCheck %s
+# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-b,zba < %s 2>&1 | FileCheck %s
 
 # Too few operands
 sh1add t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
Index: llvm/test/MC/RISCV/attribute-arch-invalid.s
===================================================================
--- llvm/test/MC/RISCV/attribute-arch-invalid.s
+++ llvm/test/MC/RISCV/attribute-arch-invalid.s
@@ -8,15 +8,6 @@
 .attribute arch, "rv32iv"
 # CHECK: error: invalid arch name 'rv32iv', experimental extension requires explicit version number `v`
 
-.attribute arch, "rv32izba"
-# CHECK: error: invalid arch name 'rv32izba', experimental extension requires explicit version number `zba`
-
-.attribute arch, "rv32izbb"
-# CHECK: error: invalid arch name 'rv32izbb', experimental extension requires explicit version number `zbb`
-
-.attribute arch, "rv32izbc"
-# CHECK: error: invalid arch name 'rv32izbc', experimental extension requires explicit version number `zbc`
-
 .attribute arch, "rv32izbe"
 # CHECK:  error: invalid arch name 'rv32izbe', experimental extension requires explicit version number `zbe`
 
@@ -32,9 +23,6 @@
 .attribute arch, "rv32izbr"
 # CHECK: error: invalid arch name 'rv32izbr', experimental extension requires explicit version number `zbr`
 
-.attribute arch, "rv32izbs"
-# CHECK: error: invalid arch name 'rv32izbs', experimental extension requires explicit version number `zbs`
-
 .attribute arch, "rv32izbt"
 # CHECK: error: invalid arch name 'rv32izbt', experimental extension requires explicit version number `zbt`
 
Index: llvm/test/CodeGen/RISCV/xaluo.ll
===================================================================
--- llvm/test/CodeGen/RISCV/xaluo.ll
+++ llvm/test/CodeGen/RISCV/xaluo.ll
@@ -1,8 +1,8 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=riscv32 -mattr=+m -verify-machineinstrs | FileCheck %s --check-prefix=RV32
 ; RUN: llc < %s -mtriple=riscv64 -mattr=+m -verify-machineinstrs | FileCheck %s --check-prefix=RV64
-; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zba -verify-machineinstrs | FileCheck %s --check-prefix=RV32ZBA
-; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zba -verify-machineinstrs | FileCheck %s --check-prefix=RV64ZBA
+; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zba -verify-machineinstrs | FileCheck %s --check-prefix=RV32ZBA
+; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zba -verify-machineinstrs | FileCheck %s --check-prefix=RV64ZBA
 
 ;
 ; Get the actual value of the overflow bit.
Index: llvm/test/CodeGen/RISCV/usub_sat_plus.ll
===================================================================
--- llvm/test/CodeGen/RISCV/usub_sat_plus.ll
+++ llvm/test/CodeGen/RISCV/usub_sat_plus.ll
@@ -1,8 +1,8 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I
 ; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I
-; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefix=RV32IZbb
-; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefix=RV64IZbb
+; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zbb | FileCheck %s --check-prefix=RV32IZbb
+; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb | FileCheck %s --check-prefix=RV64IZbb
 
 declare i4 @llvm.usub.sat.i4(i4, i4)
 declare i8 @llvm.usub.sat.i8(i8, i8)
Index: llvm/test/CodeGen/RISCV/usub_sat.ll
===================================================================
--- llvm/test/CodeGen/RISCV/usub_sat.ll
+++ llvm/test/CodeGen/RISCV/usub_sat.ll
@@ -1,8 +1,8 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I
 ; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I
-; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefix=RV32IZbb
-; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefix=RV64IZbb
+; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zbb | FileCheck %s --check-prefix=RV32IZbb
+; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb | FileCheck %s --check-prefix=RV64IZbb
 
 declare i4 @llvm.usub.sat.i4(i4, i4)
 declare i8 @llvm.usub.sat.i8(i8, i8)
Index: llvm/test/CodeGen/RISCV/unfold-masked-merge-scalar-variablemask.ll
===================================================================
--- llvm/test/CodeGen/RISCV/unfold-masked-merge-scalar-variablemask.ll
+++ llvm/test/CodeGen/RISCV/unfold-masked-merge-scalar-variablemask.ll
@@ -3,9 +3,9 @@
 ; RUN:   | FileCheck %s --check-prefixes=CHECK,RV32,RV32I
 ; RUN: llc -mtriple=riscv64 < %s \
 ; RUN:   | FileCheck %s --check-prefixes=CHECK,RV64,RV64I
-; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbb < %s \
+; RUN: llc -mtriple=riscv32 -mattr=+zbb < %s \
 ; RUN:   | FileCheck %s --check-prefixes=CHECK,RV32,RV32ZBB
-; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbb < %s \
+; RUN: llc -mtriple=riscv64 -mattr=+zbb < %s \
 ; RUN:   | FileCheck %s --check-prefixes=CHECK,RV64,RV64ZBB
 
 ; TODO: Should we convert these to X ^ ((X ^ Y) & M) form when Zbb isn't
Index: llvm/test/CodeGen/RISCV/uadd_sat_plus.ll
===================================================================
--- llvm/test/CodeGen/RISCV/uadd_sat_plus.ll
+++ llvm/test/CodeGen/RISCV/uadd_sat_plus.ll
@@ -1,8 +1,8 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I
 ; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I
-; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefix=RV32IZbb
-; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefix=RV64IZbb
+; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zbb | FileCheck %s --check-prefix=RV32IZbb
+; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb | FileCheck %s --check-prefix=RV64IZbb
 
 declare i4 @llvm.uadd.sat.i4(i4, i4)
 declare i8 @llvm.uadd.sat.i8(i8, i8)
Index: llvm/test/CodeGen/RISCV/uadd_sat.ll
===================================================================
--- llvm/test/CodeGen/RISCV/uadd_sat.ll
+++ llvm/test/CodeGen/RISCV/uadd_sat.ll
@@ -1,8 +1,8 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I
 ; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I
-; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefix=RV32IZbb
-; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefix=RV64IZbb
+; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zbb | FileCheck %s --check-prefix=RV32IZbb
+; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb | FileCheck %s --check-prefix=RV64IZbb
 
 declare i4 @llvm.uadd.sat.i4(i4, i4)
 declare i8 @llvm.uadd.sat.i8(i8, i8)
Index: llvm/test/CodeGen/RISCV/ssub_sat_plus.ll
===================================================================
--- llvm/test/CodeGen/RISCV/ssub_sat_plus.ll
+++ llvm/test/CodeGen/RISCV/ssub_sat_plus.ll
@@ -1,10 +1,10 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I
 ; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I
-; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbNOZbt
-; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbNOZbt
-; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbZbt
-; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbZbt
+; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zbb | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbNOZbt
+; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbNOZbt
+; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbZbt
+; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbZbt
 
 declare i4 @llvm.ssub.sat.i4(i4, i4)
 declare i8 @llvm.ssub.sat.i8(i8, i8)
Index: llvm/test/CodeGen/RISCV/ssub_sat.ll
===================================================================
--- llvm/test/CodeGen/RISCV/ssub_sat.ll
+++ llvm/test/CodeGen/RISCV/ssub_sat.ll
@@ -1,10 +1,10 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I
 ; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I
-; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbNOZbt
-; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbNOZbt
-; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbZbt
-; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbZbt
+; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zbb | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbNOZbt
+; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbNOZbt
+; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbZbt
+; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbZbt
 
 declare i4 @llvm.ssub.sat.i4(i4, i4)
 declare i8 @llvm.ssub.sat.i8(i8, i8)
Index: llvm/test/CodeGen/RISCV/sextw-removal.ll
===================================================================
--- llvm/test/CodeGen/RISCV/sextw-removal.ll
+++ llvm/test/CodeGen/RISCV/sextw-removal.ll
@@ -1,9 +1,9 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+f \
 ; RUN:   | FileCheck %s --check-prefixes=CHECK,RV64I
-; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb,+f \
+; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb,+f \
 ; RUN:   | FileCheck %s --check-prefixes=CHECK,RV64ZBB
-; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb,+f \
+; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb,+f \
 ; RUN:   -riscv-disable-sextw-removal | FileCheck %s --check-prefix=NOREMOVAL
 
 define void @test1(i32 signext %arg, i32 signext %arg1) nounwind {
Index: llvm/test/CodeGen/RISCV/selectcc-to-shiftand.ll
===================================================================
--- llvm/test/CodeGen/RISCV/selectcc-to-shiftand.ll
+++ llvm/test/CodeGen/RISCV/selectcc-to-shiftand.ll
@@ -3,9 +3,9 @@
 ; RUN:   | FileCheck %s --check-prefixes=CHECK,RV32,RV32I
 ; RUN: llc < %s -mtriple=riscv64 \
 ; RUN:   | FileCheck %s --check-prefixes=CHECK,RV64,RV64I
-; RUN: llc < %s -mtriple=riscv32 -mattr=+experimental-zbb \
+; RUN: llc < %s -mtriple=riscv32 -mattr=+zbb \
 ; RUN:   | FileCheck %s --check-prefixes=CHECK,RV32,RV32ZBB
-; RUN: llc < %s -mtriple=riscv64 -mattr=+experimental-zbb \
+; RUN: llc < %s -mtriple=riscv64 -mattr=+zbb \
 ; RUN:   | FileCheck %s --check-prefixes=CHECK,RV64,RV64ZBB
 
 ; Compare if negative and select of constants where one constant is zero.
Index: llvm/test/CodeGen/RISCV/sadd_sat_plus.ll
===================================================================
--- llvm/test/CodeGen/RISCV/sadd_sat_plus.ll
+++ llvm/test/CodeGen/RISCV/sadd_sat_plus.ll
@@ -1,10 +1,10 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I
 ; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I
-; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbNOZbt
-; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbNOZbt
-; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbZbt
-; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbZbt
+; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zbb | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbNOZbt
+; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbNOZbt
+; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbZbt
+; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbZbt
 
 declare i4 @llvm.sadd.sat.i4(i4, i4)
 declare i8 @llvm.sadd.sat.i8(i8, i8)
Index: llvm/test/CodeGen/RISCV/sadd_sat.ll
===================================================================
--- llvm/test/CodeGen/RISCV/sadd_sat.ll
+++ llvm/test/CodeGen/RISCV/sadd_sat.ll
@@ -1,10 +1,10 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I
 ; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I
-; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbNOZbt
-; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbNOZbt
-; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbZbt
-; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbZbt
+; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zbb | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbNOZbt
+; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbNOZbt
+; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbZbt
+; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbZbt
 
 declare i4 @llvm.sadd.sat.i4(i4, i4)
 declare i8 @llvm.sadd.sat.i8(i8, i8)
Index: llvm/test/CodeGen/RISCV/rvv/fixed-vectors-store-merge-crash.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-store-merge-crash.ll
+++ llvm/test/CodeGen/RISCV/rvv/fixed-vectors-store-merge-crash.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=riscv64 -mattr=+experimental-zbb,+experimental-v \
+; RUN: llc < %s -mtriple=riscv64 -mattr=+zbb,+experimental-v \
 ; RUN:     -riscv-v-vector-bits-min=128 | FileCheck %s
 
 ; This test loads to values and stores them in reversed order. This previously
Index: llvm/test/CodeGen/RISCV/rv64zbs.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rv64zbs.ll
+++ llvm/test/CodeGen/RISCV/rv64zbs.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV64I
-; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbs -verify-machineinstrs < %s \
+; RUN: llc -mtriple=riscv64 -mattr=+zbs -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV64ZBS
 
 define signext i32 @bclr_i32(i32 signext %a, i32 signext %b) nounwind {
Index: llvm/test/CodeGen/RISCV/rv64zbc-intrinsic.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rv64zbc-intrinsic.ll
+++ llvm/test/CodeGen/RISCV/rv64zbc-intrinsic.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbc -verify-machineinstrs < %s \
+; RUN: llc -mtriple=riscv64 -mattr=+zbc -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV64ZBC
 
 declare i64 @llvm.riscv.clmul.i64(i64 %a, i64 %b)
Index: llvm/test/CodeGen/RISCV/rv64zbb.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rv64zbb.ll
+++ llvm/test/CodeGen/RISCV/rv64zbb.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV64I
-; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbb -verify-machineinstrs < %s \
+; RUN: llc -mtriple=riscv64 -mattr=+zbb -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV64ZBB
 
 declare i32 @llvm.ctlz.i32(i32, i1)
Index: llvm/test/CodeGen/RISCV/rv64zbb-zbp.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rv64zbb-zbp.ll
+++ llvm/test/CodeGen/RISCV/rv64zbb-zbp.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV64I
-; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbb -verify-machineinstrs < %s \
+; RUN: llc -mtriple=riscv64 -mattr=+zbb -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV64ZBB
 ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbp -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV64ZBP
Index: llvm/test/CodeGen/RISCV/rv64zbb-intrinsic.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rv64zbb-intrinsic.ll
+++ llvm/test/CodeGen/RISCV/rv64zbb-intrinsic.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbb -verify-machineinstrs < %s \
+; RUN: llc -mtriple=riscv64 -mattr=+zbb -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV64ZBB
 
 declare i32 @llvm.riscv.orc.b.i32(i32)
Index: llvm/test/CodeGen/RISCV/rv64zba.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rv64zba.ll
+++ llvm/test/CodeGen/RISCV/rv64zba.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=riscv64 -mattr=+m -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV64I
-; RUN: llc -mtriple=riscv64 -mattr=+m,+experimental-zba -verify-machineinstrs < %s \
+; RUN: llc -mtriple=riscv64 -mattr=+m,+zba -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV64ZBA
 
 define i64 @slliuw(i64 %a) nounwind {
Index: llvm/test/CodeGen/RISCV/rv64i-exhaustive-w-insts.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rv64i-exhaustive-w-insts.ll
+++ llvm/test/CodeGen/RISCV/rv64i-exhaustive-w-insts.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefixes=RV64,RV64I
-; RUN: llc -mtriple=riscv64 -verify-machineinstrs -mattr=+experimental-zba < %s \
+; RUN: llc -mtriple=riscv64 -verify-machineinstrs -mattr=+zba < %s \
 ; RUN:   | FileCheck %s -check-prefixes=RV64,RV64ZBA
 
 ; The patterns for the 'W' suffixed RV64I instructions have the potential of
Index: llvm/test/CodeGen/RISCV/rv32zbs.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rv32zbs.ll
+++ llvm/test/CodeGen/RISCV/rv32zbs.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV32I
-; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbs -verify-machineinstrs < %s \
+; RUN: llc -mtriple=riscv32 -mattr=+zbs -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV32ZBS
 
 define i32 @bclr_i32(i32 %a, i32 %b) nounwind {
Index: llvm/test/CodeGen/RISCV/rv32zbc-intrinsic.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rv32zbc-intrinsic.ll
+++ llvm/test/CodeGen/RISCV/rv32zbc-intrinsic.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbc -verify-machineinstrs < %s \
+; RUN: llc -mtriple=riscv32 -mattr=+zbc -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV32ZBC
 
 declare i32 @llvm.riscv.clmul.i32(i32 %a, i32 %b)
Index: llvm/test/CodeGen/RISCV/rv32zbb.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rv32zbb.ll
+++ llvm/test/CodeGen/RISCV/rv32zbb.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV32I
-; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbb -verify-machineinstrs < %s \
+; RUN: llc -mtriple=riscv32 -mattr=+zbb -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV32ZBB
 
 declare i32 @llvm.ctlz.i32(i32, i1)
Index: llvm/test/CodeGen/RISCV/rv32zbb-zbp.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rv32zbb-zbp.ll
+++ llvm/test/CodeGen/RISCV/rv32zbb-zbp.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV32I
-; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbb -verify-machineinstrs < %s \
+; RUN: llc -mtriple=riscv32 -mattr=+zbb -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV32ZBB
 ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbp -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV32ZBP
Index: llvm/test/CodeGen/RISCV/rv32zbb-intrinsic.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rv32zbb-intrinsic.ll
+++ llvm/test/CodeGen/RISCV/rv32zbb-intrinsic.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbb -verify-machineinstrs < %s \
+; RUN: llc -mtriple=riscv32 -mattr=+zbb -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV32ZBB
 
 declare i32 @llvm.riscv.orc.b.i32(i32)
Index: llvm/test/CodeGen/RISCV/rv32zba.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rv32zba.ll
+++ llvm/test/CodeGen/RISCV/rv32zba.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=riscv32 -mattr=+m -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV32I
-; RUN: llc -mtriple=riscv32 -mattr=+m,+experimental-zba -verify-machineinstrs < %s \
+; RUN: llc -mtriple=riscv32 -mattr=+m,+zba -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV32ZBA
 
 define signext i16 @sh1add(i64 %0, i16* %1) {
Index: llvm/test/CodeGen/RISCV/imm.ll
===================================================================
--- llvm/test/CodeGen/RISCV/imm.ll
+++ llvm/test/CodeGen/RISCV/imm.ll
@@ -3,11 +3,11 @@
 ; RUN:   | FileCheck %s -check-prefix=RV32I
 ; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -verify-machineinstrs < %s \
 ; RUN:   | FileCheck %s -check-prefix=RV64I
-; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -mattr=+experimental-zba \
+; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -mattr=+zba \
 ; RUN:   -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV64IZBA
-; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -mattr=+experimental-zbb \
+; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -mattr=+zbb \
 ; RUN:   -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV64IZBB
-; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -mattr=+experimental-zbs \
+; RUN: llc -mtriple=riscv64 -riscv-disable-using-constant-pool-for-large-ints -mattr=+zbs \
 ; RUN:   -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV64IZBS
 
 ; Materializing constants
Index: llvm/test/CodeGen/RISCV/div-by-constant.ll
===================================================================
--- llvm/test/CodeGen/RISCV/div-by-constant.ll
+++ llvm/test/CodeGen/RISCV/div-by-constant.ll
@@ -1,12 +1,12 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=riscv32 -mattr=+m -verify-machineinstrs < %s \
 ; RUN:   | FileCheck -check-prefixes=RV32,RV32IM %s
-; RUN: llc -mtriple=riscv32 -mattr=+m,+experimental-zba,+experimental-zbb \
+; RUN: llc -mtriple=riscv32 -mattr=+m,+zba,+zbb \
 ; RUN:    -verify-machineinstrs < %s \
 ; RUN:   | FileCheck -check-prefixes=RV32,RV32IMZB %s
 ; RUN: llc -mtriple=riscv64 -mattr=+m -verify-machineinstrs < %s \
 ; RUN:   | FileCheck -check-prefixes=RV64,RV64IM %s
-; RUN: llc -mtriple=riscv64 -mattr=+m,+experimental-zba,+experimental-zbb \
+; RUN: llc -mtriple=riscv64 -mattr=+m,+zba,+zbb \
 ; RUN:   -verify-machineinstrs < %s \
 ; RUN:   | FileCheck -check-prefixes=RV64,RV64IMZB %s
 
Index: llvm/test/CodeGen/RISCV/attributes.ll
===================================================================
--- llvm/test/CodeGen/RISCV/attributes.ll
+++ llvm/test/CodeGen/RISCV/attributes.ll
@@ -7,15 +7,15 @@
 ; RUN: llc -mtriple=riscv32 -mattr=+c %s -o - | FileCheck --check-prefix=RV32C %s
 ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zfhmin %s -o - | FileCheck --check-prefix=RV32ZFHMIN %s
 ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zfh %s -o - | FileCheck --check-prefix=RV32ZFH %s
-; RUN: llc -mtriple=riscv32 -mattr=+experimental-zba %s -o - | FileCheck --check-prefix=RV32ZBA %s
-; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbb %s -o - | FileCheck --check-prefix=RV32ZBB %s
-; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbc %s -o - | FileCheck --check-prefix=RV32ZBC %s
+; RUN: llc -mtriple=riscv32 -mattr=+zba %s -o - | FileCheck --check-prefix=RV32ZBA %s
+; RUN: llc -mtriple=riscv32 -mattr=+zbb %s -o - | FileCheck --check-prefix=RV32ZBB %s
+; RUN: llc -mtriple=riscv32 -mattr=+zbc %s -o - | FileCheck --check-prefix=RV32ZBC %s
 ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbe %s -o - | FileCheck --check-prefix=RV32ZBE %s
 ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbf %s -o - | FileCheck --check-prefix=RV32ZBF %s
 ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbm %s -o - | FileCheck --check-prefix=RV32ZBM %s
 ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbp %s -o - | FileCheck --check-prefix=RV32ZBP %s
 ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbr %s -o - | FileCheck --check-prefix=RV32ZBR %s
-; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbs %s -o - | FileCheck --check-prefix=RV32ZBS %s
+; RUN: llc -mtriple=riscv32 -mattr=+zbs %s -o - | FileCheck --check-prefix=RV32ZBS %s
 ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbt %s -o - | FileCheck --check-prefix=RV32ZBT %s
 ; RUN: llc -mtriple=riscv64 -mattr=+m %s -o - | FileCheck --check-prefix=RV64M %s
 ; RUN: llc -mtriple=riscv64 -mattr=+a %s -o - | FileCheck --check-prefix=RV64A %s
@@ -24,15 +24,15 @@
 ; RUN: llc -mtriple=riscv64 -mattr=+c %s -o - | FileCheck --check-prefix=RV64C %s
 ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zfhmin %s -o - | FileCheck --check-prefix=RV64ZFHMIN %s
 ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zfh %s -o - | FileCheck --check-prefix=RV64ZFH %s
-; RUN: llc -mtriple=riscv64 -mattr=+experimental-zba %s -o - | FileCheck --check-prefix=RV64ZBA %s
-; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbb %s -o - | FileCheck --check-prefix=RV64ZBB %s
-; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbc %s -o - | FileCheck --check-prefix=RV64ZBC %s
+; RUN: llc -mtriple=riscv64 -mattr=+zba %s -o - | FileCheck --check-prefix=RV64ZBA %s
+; RUN: llc -mtriple=riscv64 -mattr=+zbb %s -o - | FileCheck --check-prefix=RV64ZBB %s
+; RUN: llc -mtriple=riscv64 -mattr=+zbc %s -o - | FileCheck --check-prefix=RV64ZBC %s
 ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbe %s -o - | FileCheck --check-prefix=RV64ZBE %s
 ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbf %s -o - | FileCheck --check-prefix=RV64ZBF %s
 ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbm %s -o - | FileCheck --check-prefix=RV64ZBM %s
 ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbp %s -o - | FileCheck --check-prefix=RV64ZBP %s
 ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbr %s -o - | FileCheck --check-prefix=RV64ZBR %s
-; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbs %s -o - | FileCheck --check-prefix=RV64ZBS %s
+; RUN: llc -mtriple=riscv64 -mattr=+zbs %s -o - | FileCheck --check-prefix=RV64ZBS %s
 ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zbt %s -o - | FileCheck --check-prefix=RV64ZBT %s
 
 ; RV32M: .attribute 5, "rv32i2p0_m2p0"
Index: llvm/test/CodeGen/RISCV/addimm-mulimm.ll
===================================================================
--- llvm/test/CodeGen/RISCV/addimm-mulimm.ll
+++ llvm/test/CodeGen/RISCV/addimm-mulimm.ll
@@ -2,9 +2,9 @@
 ;; Test that (mul (add x, c1), c2) can be transformed to
 ;; (add (mul x, c2), c1*c2) if profitable.
 
-; RUN: llc -mtriple=riscv32 -mattr=+m,+experimental-zba -verify-machineinstrs < %s \
+; RUN: llc -mtriple=riscv32 -mattr=+m,+zba -verify-machineinstrs < %s \
 ; RUN:   | FileCheck -check-prefix=RV32IMB %s
-; RUN: llc -mtriple=riscv64 -mattr=+m,+experimental-zba -verify-machineinstrs < %s \
+; RUN: llc -mtriple=riscv64 -mattr=+m,+zba -verify-machineinstrs < %s \
 ; RUN:   | FileCheck -check-prefix=RV64IMB %s
 
 define i32 @add_mul_combine_accept_a1(i32 %x) {
Index: llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
===================================================================
--- llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
+++ llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
@@ -18,8 +18,10 @@
 //   Zbp - 0.93
 //   Zbr - 0.93
 //   Zbt - 0.93
-// This version is still experimental as the Bitmanip extensions haven't been
-// ratified yet.
+//
+// Zba, Zbb, Zbc, and Zbs have been ratified and are considered stable. The
+// other extensions are experimental as they have not yet been ratiied and are
+// subject to change.
 //
 //===----------------------------------------------------------------------===//
 
Index: llvm/lib/Target/RISCV/RISCV.td
===================================================================
--- llvm/lib/Target/RISCV/RISCV.td
+++ llvm/lib/Target/RISCV/RISCV.td
@@ -65,7 +65,7 @@
                            "'C' (Compressed Instructions)">;
 
 def FeatureStdExtZba
-    : SubtargetFeature<"experimental-zba", "HasStdExtZba", "true",
+    : SubtargetFeature<"zba", "HasStdExtZba", "true",
                        "'Zba' (Address calculation 'B' Instructions)">;
 def HasStdExtZba : Predicate<"Subtarget->hasStdExtZba()">,
                              AssemblerPredicate<(all_of FeatureStdExtZba),
@@ -73,14 +73,14 @@
 def NotHasStdExtZba : Predicate<"!Subtarget->hasStdExtZba()">;
 
 def FeatureStdExtZbb
-    : SubtargetFeature<"experimental-zbb", "HasStdExtZbb", "true",
+    : SubtargetFeature<"zbb", "HasStdExtZbb", "true",
                        "'Zbb' (Base 'B' Instructions)">;
 def HasStdExtZbb : Predicate<"Subtarget->hasStdExtZbb()">,
                              AssemblerPredicate<(all_of FeatureStdExtZbb),
                              "'Zbb' (Base 'B' Instructions)">;
 
 def FeatureStdExtZbc
-    : SubtargetFeature<"experimental-zbc", "HasStdExtZbc", "true",
+    : SubtargetFeature<"zbc", "HasStdExtZbc", "true",
                        "'Zbc' (Carry-Less 'B' Instructions)">;
 def HasStdExtZbc : Predicate<"Subtarget->hasStdExtZbc()">,
                              AssemblerPredicate<(all_of FeatureStdExtZbc),
@@ -122,7 +122,7 @@
                              "'Zbr' (Polynomial Reduction 'B' Instructions)">;
 
 def FeatureStdExtZbs
-    : SubtargetFeature<"experimental-zbs", "HasStdExtZbs", "true",
+    : SubtargetFeature<"zbs", "HasStdExtZbs", "true",
                        "'Zbs' (Single-Bit 'B' Instructions)">;
 def HasStdExtZbs : Predicate<"Subtarget->hasStdExtZbs()">,
                              AssemblerPredicate<(all_of FeatureStdExtZbs),
Index: llvm/lib/Support/RISCVISAInfo.cpp
===================================================================
--- llvm/lib/Support/RISCVISAInfo.cpp
+++ llvm/lib/Support/RISCVISAInfo.cpp
@@ -46,19 +46,20 @@
     {"f", RISCVExtensionVersion{2, 0}},
     {"d", RISCVExtensionVersion{2, 0}},
     {"c", RISCVExtensionVersion{2, 0}},
-};
 
-static const RISCVSupportedExtension SupportedExperimentalExtensions[] = {
-    {"v", RISCVExtensionVersion{0, 10}},
     {"zba", RISCVExtensionVersion{1, 0}},
     {"zbb", RISCVExtensionVersion{1, 0}},
     {"zbc", RISCVExtensionVersion{1, 0}},
+    {"zbs", RISCVExtensionVersion{1, 0}},
+};
+
+static const RISCVSupportedExtension SupportedExperimentalExtensions[] = {
+    {"v", RISCVExtensionVersion{0, 10}},
     {"zbe", RISCVExtensionVersion{0, 93}},
     {"zbf", RISCVExtensionVersion{0, 93}},
     {"zbm", RISCVExtensionVersion{0, 93}},
     {"zbp", RISCVExtensionVersion{0, 93}},
     {"zbr", RISCVExtensionVersion{0, 93}},
-    {"zbs", RISCVExtensionVersion{1, 0}},
     {"zbt", RISCVExtensionVersion{0, 93}},
 
     {"zvlsseg", RISCVExtensionVersion{0, 10}},
Index: clang/test/Preprocessor/riscv-target-features.c
===================================================================
--- clang/test/Preprocessor/riscv-target-features.c
+++ clang/test/Preprocessor/riscv-target-features.c
@@ -98,30 +98,48 @@
 // CHECK-C-EXT: __riscv_c 2000000
 // CHECK-C-EXT: __riscv_compressed 1
 
-// RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \
+// RUN: %clang -target riscv32-unknown-linux-gnu \
 // RUN: -march=rv32izba1p0 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-ZBA-EXT %s
-// RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \
+// RUN: %clang -target riscv32-unknown-linux-gnu \
+// RUN: -march=rv32izba -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZBA-EXT %s
+// RUN: %clang -target riscv64-unknown-linux-gnu \
 // RUN: -march=rv64izba1p0 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-ZBA-EXT %s
+// RUN: %clang -target riscv64-unknown-linux-gnu \
+// RUN: -march=rv64izba -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZBA-EXT %s
 // CHECK-ZBA-NOT: __riscv_b
 // CHECK-ZBA-EXT: __riscv_zba 1000000{{$}}
 
-// RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \
+// RUN: %clang -target riscv32-unknown-linux-gnu \
 // RUN: -march=rv32izbb1p0 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-ZBB-EXT %s
-// RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \
+// RUN: %clang -target riscv32-unknown-linux-gnu \
+// RUN: -march=rv32izbb -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZBB-EXT %s
+// RUN: %clang -target riscv64-unknown-linux-gnu \
 // RUN: -march=rv64izbb1p0 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-ZBB-EXT %s
+// RUN: %clang -target riscv64-unknown-linux-gnu \
+// RUN: -march=rv64izbb -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZBB-EXT %s
 // CHECK-ZBB-NOT: __riscv_b
 // CHECK-ZBB-EXT: __riscv_zbb 1000000{{$}}
 
-// RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \
+// RUN: %clang -target riscv32-unknown-linux-gnu \
 // RUN: -march=rv32izbc1p0 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-ZBC-EXT %s
-// RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \
+// RUN: %clang -target riscv32-unknown-linux-gnu \
+// RUN: -march=rv32izbc -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZBC-EXT %s
+// RUN: %clang -target riscv64-unknown-linux-gnu \
 // RUN: -march=rv64izbc1p0 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-ZBC-EXT %s
+// RUN: %clang -target riscv64-unknown-linux-gnu \
+// RUN: -march=rv64izbc -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZBC-EXT %s
 // CHECK-ZBC-NOT: __riscv_b
 // CHECK-ZBC-EXT: __riscv_zbc 1000000{{$}}
 
@@ -170,12 +188,18 @@
 // CHECK-ZBR-NOT: __riscv_b
 // CHECK-ZBR-EXT: __riscv_zbr 93000
 
-// RUN: %clang -target riscv32-unknown-linux-gnu -menable-experimental-extensions \
+// RUN: %clang -target riscv32-unknown-linux-gnu \
 // RUN: -march=rv32izbs1p0 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-ZBS-EXT %s
-// RUN: %clang -target riscv64-unknown-linux-gnu -menable-experimental-extensions \
+// RUN: %clang -target riscv32-unknown-linux-gnu \
+// RUN: -march=rv32izbs -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZBS-EXT %s
+// RUN: %clang -target riscv64-unknown-linux-gnu \
 // RUN: -march=rv64izbs1p0 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-ZBS-EXT %s
+// RUN: %clang -target riscv64-unknown-linux-gnu \
+// RUN: -march=rv64izbs -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZBS-EXT %s
 // CHECK-ZBS-NOT: __riscv_b
 // CHECK-ZBS-EXT: __riscv_zbs 1000000{{$}}
 
Index: clang/test/Driver/riscv-arch.c
===================================================================
--- clang/test/Driver/riscv-arch.c
+++ clang/test/Driver/riscv-arch.c
@@ -376,27 +376,26 @@
 // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV64-TARGET %s
 // RV64-TARGET: "-triple" "riscv64-unknown-unknown-elf"
 
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izbb1p0 -### %s \
+// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ZBB %s
 // RUN: %clang -target riscv32-unknown-elf -march=rv32izbb -### %s \
-// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBB-NOFLAG %s
-// RV32-EXPERIMENTAL-ZBB-NOFLAG: error: invalid arch name 'rv32izbb'
-// RV32-EXPERIMENTAL-ZBB-NOFLAG: requires '-menable-experimental-extensions'
-
-// RUN: %clang -target riscv32-unknown-elf -march=rv32izbb1p0 -menable-experimental-extensions -### %s \
-// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBB %s
-// RV32-EXPERIMENTAL-ZBB: "-target-feature" "+experimental-zbb"
+// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ZBB %s
+// RV32-ZBB: "-target-feature" "+zbb"
 
 // RUN: %clang -target riscv32-unknown-elf -march=rv32izbb1p0_zbp0p93 -menable-experimental-extensions -### %s \
 // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBB-ZBP %s
-// RV32-EXPERIMENTAL-ZBB-ZBP: "-target-feature" "+experimental-zbb"
+// RV32-EXPERIMENTAL-ZBB-ZBP: "-target-feature" "+zbb"
 // RV32-EXPERIMENTAL-ZBB-ZBP: "-target-feature" "+experimental-zbp"
 
 // RUN: %clang -target riscv32-unknown-elf -march=rv32izbb1p0zbp0p93 -menable-experimental-extensions -### %s \
 // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBB-ZBP-UNDERSCORE %s
 // RV32-EXPERIMENTAL-ZBB-ZBP-UNDERSCORE: error: invalid arch name 'rv32izbb1p0zbp0p93', unsupported version number 0.93 for extension 'zbb1p0zbp'
 
-// RUN: %clang -target riscv32-unknown-elf -march=rv32izba1p0 -menable-experimental-extensions -### %s \
-// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBA %s
-// RV32-EXPERIMENTAL-ZBA: "-target-feature" "+experimental-zba"
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izba1p0 -### %s \
+// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ZBA %s
+// RUN: %clang -target riscv32-unknown-elf -march=rv32izba -### %s \
+// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ZBA %s
+// RV32-ZBA: "-target-feature" "+zba"
 
 // RUN: %clang -target riscv32-unknown-elf -march=rv32iv -### %s -c 2>&1 | \
 // RUN:   FileCheck -check-prefix=RV32-EXPERIMENTAL-V-NOFLAG %s
Index: clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbc.c
===================================================================
--- clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbc.c
+++ clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbc.c
@@ -1,5 +1,5 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
-// RUN: %clang_cc1 -triple riscv64 -target-feature +experimental-zbc -emit-llvm %s -o - \
+// RUN: %clang_cc1 -triple riscv64 -target-feature +zbc -emit-llvm %s -o - \
 // RUN:     | FileCheck %s  -check-prefix=RV64ZBC
 
 // RV64ZBC-LABEL: @clmul(
Index: clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbb.c
===================================================================
--- clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbb.c
+++ clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbb.c
@@ -1,5 +1,5 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
-// RUN: %clang_cc1 -triple riscv64 -target-feature +experimental-zbb -emit-llvm %s -o - \
+// RUN: %clang_cc1 -triple riscv64 -target-feature +zbb -emit-llvm %s -o - \
 // RUN:     | FileCheck %s  -check-prefix=RV64ZBB
 
 // RV64ZBB-LABEL: @orc_b_32(
Index: clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbc.c
===================================================================
--- clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbc.c
+++ clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbc.c
@@ -1,5 +1,5 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
-// RUN: %clang_cc1 -triple riscv32 -target-feature +experimental-zbc -emit-llvm %s -o - \
+// RUN: %clang_cc1 -triple riscv32 -target-feature +zbc -emit-llvm %s -o - \
 // RUN:     | FileCheck %s  -check-prefix=RV32ZBC
 
 // RV32ZBC-LABEL: @clmul(
Index: clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb.c
===================================================================
--- clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb.c
+++ clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb.c
@@ -1,5 +1,5 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
-// RUN: %clang_cc1 -triple riscv32 -target-feature +experimental-zbb -emit-llvm %s -o - \
+// RUN: %clang_cc1 -triple riscv32 -target-feature +zbb -emit-llvm %s -o - \
 // RUN:     | FileCheck %s  -check-prefix=RV32ZBB
 
 // RV32ZBB-LABEL: @orc_b_32(
Index: clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb-error.c
===================================================================
--- clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb-error.c
+++ clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb-error.c
@@ -1,5 +1,5 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
-// RUN: %clang_cc1 -triple riscv32 -target-feature +experimental-zbb -verify %s -o -
+// RUN: %clang_cc1 -triple riscv32 -target-feature +zbb -verify %s -o -
 
 int orc_b_64(int a) {
   return __builtin_riscv_orc_b_64(a); // expected-error {{builtin requires 'RV64' extension support to be enabled}}
Index: clang/include/clang/Basic/BuiltinsRISCV.def
===================================================================
--- clang/include/clang/Basic/BuiltinsRISCV.def
+++ clang/include/clang/Basic/BuiltinsRISCV.def
@@ -16,13 +16,13 @@
 #endif
 
 // Zbb extension
-TARGET_BUILTIN(__builtin_riscv_orc_b_32, "ZiZi", "nc", "experimental-zbb")
-TARGET_BUILTIN(__builtin_riscv_orc_b_64, "WiWi", "nc", "experimental-zbb,64bit")
+TARGET_BUILTIN(__builtin_riscv_orc_b_32, "ZiZi", "nc", "zbb")
+TARGET_BUILTIN(__builtin_riscv_orc_b_64, "WiWi", "nc", "zbb,64bit")
 
 // Zbc extension
-TARGET_BUILTIN(__builtin_riscv_clmul, "LiLiLi", "nc", "experimental-zbc")
-TARGET_BUILTIN(__builtin_riscv_clmulh, "LiLiLi", "nc", "experimental-zbc")
-TARGET_BUILTIN(__builtin_riscv_clmulr, "LiLiLi", "nc", "experimental-zbc")
+TARGET_BUILTIN(__builtin_riscv_clmul, "LiLiLi", "nc", "zbc")
+TARGET_BUILTIN(__builtin_riscv_clmulh, "LiLiLi", "nc", "zbc")
+TARGET_BUILTIN(__builtin_riscv_clmulr, "LiLiLi", "nc", "zbc")
 
 // Zbe extension
 TARGET_BUILTIN(__builtin_riscv_bcompress_32, "ZiZiZi", "nc", "experimental-zbe")

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