dmgreen added a comment.

Hmm. This appears to be mapping pmuv3p4 to "perfmon". But "perfmon" has been 
around a long time, not a new feature related to the pmuv3p4 update. It seems 
on the AArch64 side to control access to PMCCNTR, i.e. access to the base 
FEAT_PMUv3.

On the Arm side this is altering how HasV7Ops is define in 
https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/ARM/ARM.td#L515, 
which in turn is breaking Cortex-M cpus. It's probably a bug that HasV7Ops 
includes FeaturePerfMon, it shouldn't be included in HasV8MMainlineOps or 
ARMv7m if it's reading a system register with an mrc.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116748/new/

https://reviews.llvm.org/D116748

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