RKSimon added inline comments.
================
Comment at: clang/test/CodeGen/X86/avx-builtins.c:182
// CHECK-LABEL: test_mm256_castsi128_si256
- // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <4 x i32> <i32
0, i32 1, i32 undef, i32 undef>
+ // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <4 x i32> <i32
0, i32 1, i32 poison, i32 poison>
return _mm256_castsi128_si256(A);
----------------
efriedma wrote:
> This change might be visible to user code.
Yes the length changing casts are worrying me as well - we could update the
header to insert zero into the upper elements I suppose, in many cases these
would be folded away by AVX ops implicitly zeroing the 128-bits. But we'd
definitely have the potential for regressions.
================
Comment at: clang/test/CodeGen/X86/avx-builtins.c:1239
// CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> poison, <8 x i32>
<i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
// CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x i32>
<i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
return _mm256_loadu2_m128(A, B);
----------------
These look out of date - D109497 changes the loadu2 codegen to be a single
'concat' shuffle.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D103874/new/
https://reviews.llvm.org/D103874
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