Author: Hsiangkai Wang Date: 2021-07-21T09:55:21+08:00 New Revision: 89ce6449024d2b288b825e815ab5cc11faf04d22
URL: https://github.com/llvm/llvm-project/commit/89ce6449024d2b288b825e815ab5cc11faf04d22 DIFF: https://github.com/llvm/llvm-project/commit/89ce6449024d2b288b825e815ab5cc11faf04d22.diff LOG: [Clang][RISCV] Add half-precision FP for vle16/vse16. I missed to add half-precision FP types for vle16/vse16 in the previous patches. Added them in this patch. Differential Revision: https://reviews.llvm.org/D106340 Added: Modified: clang/include/clang/Basic/riscv_vector.td clang/test/CodeGen/RISCV/rvv-intrinsics/vle.c clang/test/CodeGen/RISCV/rvv-intrinsics/vse.c Removed: ################################################################################ diff --git a/clang/include/clang/Basic/riscv_vector.td b/clang/include/clang/Basic/riscv_vector.td index 9e798a50fe887..363fee0a8188c 100644 --- a/clang/include/clang/Basic/riscv_vector.td +++ b/clang/include/clang/Basic/riscv_vector.td @@ -1212,13 +1212,13 @@ let HasVL = false, // 7.4. Vector Unit-Stride Instructions def vle1: RVVVLEMaskBuiltin; defm vle8: RVVVLEBuiltin<["c"]>; -defm vle16: RVVVLEBuiltin<["s"]>; +defm vle16: RVVVLEBuiltin<["s","x"]>; defm vle32: RVVVLEBuiltin<["i","f"]>; defm vle64: RVVVLEBuiltin<["l","d"]>; def vse1 : RVVVSEMaskBuiltin; defm vse8 : RVVVSEBuiltin<["c"]>; -defm vse16: RVVVSEBuiltin<["s"]>; +defm vse16: RVVVSEBuiltin<["s","x"]>; defm vse32: RVVVSEBuiltin<["i","f"]>; defm vse64: RVVVSEBuiltin<["l","d"]>; diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics/vle.c b/clang/test/CodeGen/RISCV/rvv-intrinsics/vle.c index 319e180fd47ce..3e9c6c0e3412c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics/vle.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics/vle.c @@ -1,11 +1,11 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: riscv-registered-target -// RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d -target-feature +experimental-v \ +// RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d \ +// RUN: -target-feature +experimental-v -target-feature +experimental-zfh \ // RUN: -disable-O0-optnone -emit-llvm %s -o - | opt -S -mem2reg | FileCheck --check-prefix=CHECK-RV64 %s #include <riscv_vector.h> -// // CHECK-RV64-LABEL: @test_vle8_v_i8mf8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 1 x i8>* @@ -16,7 +16,6 @@ vint8mf8_t test_vle8_v_i8mf8(const int8_t *base, size_t vl) { return vle8_v_i8mf8(base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_i8mf4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 2 x i8>* @@ -27,7 +26,6 @@ vint8mf4_t test_vle8_v_i8mf4(const int8_t *base, size_t vl) { return vle8_v_i8mf4(base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_i8mf2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 4 x i8>* @@ -38,7 +36,6 @@ vint8mf2_t test_vle8_v_i8mf2(const int8_t *base, size_t vl) { return vle8_v_i8mf2(base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_i8m1( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 8 x i8>* @@ -49,7 +46,6 @@ vint8m1_t test_vle8_v_i8m1(const int8_t *base, size_t vl) { return vle8_v_i8m1(base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_i8m2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 16 x i8>* @@ -60,7 +56,6 @@ vint8m2_t test_vle8_v_i8m2(const int8_t *base, size_t vl) { return vle8_v_i8m2(base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_i8m4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 32 x i8>* @@ -71,7 +66,6 @@ vint8m4_t test_vle8_v_i8m4(const int8_t *base, size_t vl) { return vle8_v_i8m4(base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_i8m8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 64 x i8>* @@ -82,7 +76,6 @@ vint8m8_t test_vle8_v_i8m8(const int8_t *base, size_t vl) { return vle8_v_i8m8(base, vl); } -// // CHECK-RV64-LABEL: @test_vle16_v_i16mf4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 1 x i16>* @@ -93,7 +86,6 @@ vint16mf4_t test_vle16_v_i16mf4(const int16_t *base, size_t vl) { return vle16_v_i16mf4(base, vl); } -// // CHECK-RV64-LABEL: @test_vle16_v_i16mf2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 2 x i16>* @@ -104,7 +96,6 @@ vint16mf2_t test_vle16_v_i16mf2(const int16_t *base, size_t vl) { return vle16_v_i16mf2(base, vl); } -// // CHECK-RV64-LABEL: @test_vle16_v_i16m1( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 4 x i16>* @@ -115,7 +106,6 @@ vint16m1_t test_vle16_v_i16m1(const int16_t *base, size_t vl) { return vle16_v_i16m1(base, vl); } -// // CHECK-RV64-LABEL: @test_vle16_v_i16m2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 8 x i16>* @@ -126,7 +116,6 @@ vint16m2_t test_vle16_v_i16m2(const int16_t *base, size_t vl) { return vle16_v_i16m2(base, vl); } -// // CHECK-RV64-LABEL: @test_vle16_v_i16m4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 16 x i16>* @@ -137,7 +126,6 @@ vint16m4_t test_vle16_v_i16m4(const int16_t *base, size_t vl) { return vle16_v_i16m4(base, vl); } -// // CHECK-RV64-LABEL: @test_vle16_v_i16m8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 32 x i16>* @@ -148,7 +136,6 @@ vint16m8_t test_vle16_v_i16m8(const int16_t *base, size_t vl) { return vle16_v_i16m8(base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_i32mf2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 1 x i32>* @@ -159,7 +146,6 @@ vint32mf2_t test_vle32_v_i32mf2(const int32_t *base, size_t vl) { return vle32_v_i32mf2(base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_i32m1( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 2 x i32>* @@ -170,7 +156,6 @@ vint32m1_t test_vle32_v_i32m1(const int32_t *base, size_t vl) { return vle32_v_i32m1(base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_i32m2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 4 x i32>* @@ -181,7 +166,6 @@ vint32m2_t test_vle32_v_i32m2(const int32_t *base, size_t vl) { return vle32_v_i32m2(base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_i32m4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 8 x i32>* @@ -192,7 +176,6 @@ vint32m4_t test_vle32_v_i32m4(const int32_t *base, size_t vl) { return vle32_v_i32m4(base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_i32m8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 16 x i32>* @@ -203,7 +186,6 @@ vint32m8_t test_vle32_v_i32m8(const int32_t *base, size_t vl) { return vle32_v_i32m8(base, vl); } -// // CHECK-RV64-LABEL: @test_vle64_v_i64m1( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 1 x i64>* @@ -214,7 +196,6 @@ vint64m1_t test_vle64_v_i64m1(const int64_t *base, size_t vl) { return vle64_v_i64m1(base, vl); } -// // CHECK-RV64-LABEL: @test_vle64_v_i64m2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 2 x i64>* @@ -225,7 +206,6 @@ vint64m2_t test_vle64_v_i64m2(const int64_t *base, size_t vl) { return vle64_v_i64m2(base, vl); } -// // CHECK-RV64-LABEL: @test_vle64_v_i64m4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 4 x i64>* @@ -236,7 +216,6 @@ vint64m4_t test_vle64_v_i64m4(const int64_t *base, size_t vl) { return vle64_v_i64m4(base, vl); } -// // CHECK-RV64-LABEL: @test_vle64_v_i64m8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 8 x i64>* @@ -247,7 +226,6 @@ vint64m8_t test_vle64_v_i64m8(const int64_t *base, size_t vl) { return vle64_v_i64m8(base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_u8mf8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 1 x i8>* @@ -258,7 +236,6 @@ vuint8mf8_t test_vle8_v_u8mf8(const uint8_t *base, size_t vl) { return vle8_v_u8mf8(base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_u8mf4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 2 x i8>* @@ -269,7 +246,6 @@ vuint8mf4_t test_vle8_v_u8mf4(const uint8_t *base, size_t vl) { return vle8_v_u8mf4(base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_u8mf2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 4 x i8>* @@ -280,7 +256,6 @@ vuint8mf2_t test_vle8_v_u8mf2(const uint8_t *base, size_t vl) { return vle8_v_u8mf2(base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_u8m1( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 8 x i8>* @@ -291,7 +266,6 @@ vuint8m1_t test_vle8_v_u8m1(const uint8_t *base, size_t vl) { return vle8_v_u8m1(base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_u8m2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 16 x i8>* @@ -302,7 +276,6 @@ vuint8m2_t test_vle8_v_u8m2(const uint8_t *base, size_t vl) { return vle8_v_u8m2(base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_u8m4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 32 x i8>* @@ -313,7 +286,6 @@ vuint8m4_t test_vle8_v_u8m4(const uint8_t *base, size_t vl) { return vle8_v_u8m4(base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_u8m8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 64 x i8>* @@ -324,7 +296,6 @@ vuint8m8_t test_vle8_v_u8m8(const uint8_t *base, size_t vl) { return vle8_v_u8m8(base, vl); } -// // CHECK-RV64-LABEL: @test_vle16_v_u16mf4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 1 x i16>* @@ -335,7 +306,6 @@ vuint16mf4_t test_vle16_v_u16mf4(const uint16_t *base, size_t vl) { return vle16_v_u16mf4(base, vl); } -// // CHECK-RV64-LABEL: @test_vle16_v_u16mf2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 2 x i16>* @@ -346,7 +316,6 @@ vuint16mf2_t test_vle16_v_u16mf2(const uint16_t *base, size_t vl) { return vle16_v_u16mf2(base, vl); } -// // CHECK-RV64-LABEL: @test_vle16_v_u16m1( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 4 x i16>* @@ -357,7 +326,6 @@ vuint16m1_t test_vle16_v_u16m1(const uint16_t *base, size_t vl) { return vle16_v_u16m1(base, vl); } -// // CHECK-RV64-LABEL: @test_vle16_v_u16m2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 8 x i16>* @@ -368,7 +336,6 @@ vuint16m2_t test_vle16_v_u16m2(const uint16_t *base, size_t vl) { return vle16_v_u16m2(base, vl); } -// // CHECK-RV64-LABEL: @test_vle16_v_u16m4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 16 x i16>* @@ -379,7 +346,6 @@ vuint16m4_t test_vle16_v_u16m4(const uint16_t *base, size_t vl) { return vle16_v_u16m4(base, vl); } -// // CHECK-RV64-LABEL: @test_vle16_v_u16m8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 32 x i16>* @@ -390,7 +356,6 @@ vuint16m8_t test_vle16_v_u16m8(const uint16_t *base, size_t vl) { return vle16_v_u16m8(base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_u32mf2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 1 x i32>* @@ -401,7 +366,6 @@ vuint32mf2_t test_vle32_v_u32mf2(const uint32_t *base, size_t vl) { return vle32_v_u32mf2(base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_u32m1( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 2 x i32>* @@ -412,7 +376,6 @@ vuint32m1_t test_vle32_v_u32m1(const uint32_t *base, size_t vl) { return vle32_v_u32m1(base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_u32m2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 4 x i32>* @@ -423,7 +386,6 @@ vuint32m2_t test_vle32_v_u32m2(const uint32_t *base, size_t vl) { return vle32_v_u32m2(base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_u32m4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 8 x i32>* @@ -434,7 +396,6 @@ vuint32m4_t test_vle32_v_u32m4(const uint32_t *base, size_t vl) { return vle32_v_u32m4(base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_u32m8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 16 x i32>* @@ -445,7 +406,6 @@ vuint32m8_t test_vle32_v_u32m8(const uint32_t *base, size_t vl) { return vle32_v_u32m8(base, vl); } -// // CHECK-RV64-LABEL: @test_vle64_v_u64m1( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 1 x i64>* @@ -456,7 +416,6 @@ vuint64m1_t test_vle64_v_u64m1(const uint64_t *base, size_t vl) { return vle64_v_u64m1(base, vl); } -// // CHECK-RV64-LABEL: @test_vle64_v_u64m2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 2 x i64>* @@ -467,7 +426,6 @@ vuint64m2_t test_vle64_v_u64m2(const uint64_t *base, size_t vl) { return vle64_v_u64m2(base, vl); } -// // CHECK-RV64-LABEL: @test_vle64_v_u64m4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 4 x i64>* @@ -478,7 +436,6 @@ vuint64m4_t test_vle64_v_u64m4(const uint64_t *base, size_t vl) { return vle64_v_u64m4(base, vl); } -// // CHECK-RV64-LABEL: @test_vle64_v_u64m8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 8 x i64>* @@ -489,7 +446,6 @@ vuint64m8_t test_vle64_v_u64m8(const uint64_t *base, size_t vl) { return vle64_v_u64m8(base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_f32mf2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast float* [[BASE:%.*]] to <vscale x 1 x float>* @@ -500,7 +456,6 @@ vfloat32mf2_t test_vle32_v_f32mf2(const float *base, size_t vl) { return vle32_v_f32mf2(base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_f32m1( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast float* [[BASE:%.*]] to <vscale x 2 x float>* @@ -511,7 +466,6 @@ vfloat32m1_t test_vle32_v_f32m1(const float *base, size_t vl) { return vle32_v_f32m1(base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_f32m2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast float* [[BASE:%.*]] to <vscale x 4 x float>* @@ -522,7 +476,6 @@ vfloat32m2_t test_vle32_v_f32m2(const float *base, size_t vl) { return vle32_v_f32m2(base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_f32m4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast float* [[BASE:%.*]] to <vscale x 8 x float>* @@ -533,7 +486,6 @@ vfloat32m4_t test_vle32_v_f32m4(const float *base, size_t vl) { return vle32_v_f32m4(base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_f32m8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast float* [[BASE:%.*]] to <vscale x 16 x float>* @@ -544,7 +496,6 @@ vfloat32m8_t test_vle32_v_f32m8(const float *base, size_t vl) { return vle32_v_f32m8(base, vl); } -// // CHECK-RV64-LABEL: @test_vle64_v_f64m1( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast double* [[BASE:%.*]] to <vscale x 1 x double>* @@ -555,7 +506,6 @@ vfloat64m1_t test_vle64_v_f64m1(const double *base, size_t vl) { return vle64_v_f64m1(base, vl); } -// // CHECK-RV64-LABEL: @test_vle64_v_f64m2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast double* [[BASE:%.*]] to <vscale x 2 x double>* @@ -566,7 +516,6 @@ vfloat64m2_t test_vle64_v_f64m2(const double *base, size_t vl) { return vle64_v_f64m2(base, vl); } -// // CHECK-RV64-LABEL: @test_vle64_v_f64m4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast double* [[BASE:%.*]] to <vscale x 4 x double>* @@ -577,7 +526,6 @@ vfloat64m4_t test_vle64_v_f64m4(const double *base, size_t vl) { return vle64_v_f64m4(base, vl); } -// // CHECK-RV64-LABEL: @test_vle64_v_f64m8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast double* [[BASE:%.*]] to <vscale x 8 x double>* @@ -588,7 +536,6 @@ vfloat64m8_t test_vle64_v_f64m8(const double *base, size_t vl) { return vle64_v_f64m8(base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_i8mf8_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 1 x i8>* @@ -599,7 +546,6 @@ vint8mf8_t test_vle8_v_i8mf8_m(vbool64_t mask, vint8mf8_t maskedoff, const int8_ return vle8_v_i8mf8_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_i8mf4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 2 x i8>* @@ -610,7 +556,6 @@ vint8mf4_t test_vle8_v_i8mf4_m(vbool32_t mask, vint8mf4_t maskedoff, const int8_ return vle8_v_i8mf4_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_i8mf2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 4 x i8>* @@ -621,7 +566,6 @@ vint8mf2_t test_vle8_v_i8mf2_m(vbool16_t mask, vint8mf2_t maskedoff, const int8_ return vle8_v_i8mf2_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_i8m1_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 8 x i8>* @@ -632,7 +576,6 @@ vint8m1_t test_vle8_v_i8m1_m(vbool8_t mask, vint8m1_t maskedoff, const int8_t *b return vle8_v_i8m1_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_i8m2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 16 x i8>* @@ -643,7 +586,6 @@ vint8m2_t test_vle8_v_i8m2_m(vbool4_t mask, vint8m2_t maskedoff, const int8_t *b return vle8_v_i8m2_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_i8m4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 32 x i8>* @@ -654,7 +596,6 @@ vint8m4_t test_vle8_v_i8m4_m(vbool2_t mask, vint8m4_t maskedoff, const int8_t *b return vle8_v_i8m4_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_i8m8_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 64 x i8>* @@ -665,7 +606,6 @@ vint8m8_t test_vle8_v_i8m8_m(vbool1_t mask, vint8m8_t maskedoff, const int8_t *b return vle8_v_i8m8_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle16_v_i16mf4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 1 x i16>* @@ -676,7 +616,6 @@ vint16mf4_t test_vle16_v_i16mf4_m(vbool64_t mask, vint16mf4_t maskedoff, const i return vle16_v_i16mf4_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle16_v_i16mf2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 2 x i16>* @@ -687,7 +626,6 @@ vint16mf2_t test_vle16_v_i16mf2_m(vbool32_t mask, vint16mf2_t maskedoff, const i return vle16_v_i16mf2_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle16_v_i16m1_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 4 x i16>* @@ -698,7 +636,6 @@ vint16m1_t test_vle16_v_i16m1_m(vbool16_t mask, vint16m1_t maskedoff, const int1 return vle16_v_i16m1_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle16_v_i16m2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 8 x i16>* @@ -709,7 +646,6 @@ vint16m2_t test_vle16_v_i16m2_m(vbool8_t mask, vint16m2_t maskedoff, const int16 return vle16_v_i16m2_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle16_v_i16m4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 16 x i16>* @@ -720,7 +656,6 @@ vint16m4_t test_vle16_v_i16m4_m(vbool4_t mask, vint16m4_t maskedoff, const int16 return vle16_v_i16m4_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle16_v_i16m8_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 32 x i16>* @@ -731,7 +666,6 @@ vint16m8_t test_vle16_v_i16m8_m(vbool2_t mask, vint16m8_t maskedoff, const int16 return vle16_v_i16m8_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_i32mf2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 1 x i32>* @@ -742,7 +676,6 @@ vint32mf2_t test_vle32_v_i32mf2_m(vbool64_t mask, vint32mf2_t maskedoff, const i return vle32_v_i32mf2_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_i32m1_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 2 x i32>* @@ -753,7 +686,6 @@ vint32m1_t test_vle32_v_i32m1_m(vbool32_t mask, vint32m1_t maskedoff, const int3 return vle32_v_i32m1_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_i32m2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 4 x i32>* @@ -764,7 +696,6 @@ vint32m2_t test_vle32_v_i32m2_m(vbool16_t mask, vint32m2_t maskedoff, const int3 return vle32_v_i32m2_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_i32m4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 8 x i32>* @@ -775,7 +706,6 @@ vint32m4_t test_vle32_v_i32m4_m(vbool8_t mask, vint32m4_t maskedoff, const int32 return vle32_v_i32m4_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_i32m8_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 16 x i32>* @@ -786,7 +716,6 @@ vint32m8_t test_vle32_v_i32m8_m(vbool4_t mask, vint32m8_t maskedoff, const int32 return vle32_v_i32m8_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle64_v_i64m1_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 1 x i64>* @@ -797,7 +726,6 @@ vint64m1_t test_vle64_v_i64m1_m(vbool64_t mask, vint64m1_t maskedoff, const int6 return vle64_v_i64m1_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle64_v_i64m2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 2 x i64>* @@ -808,7 +736,6 @@ vint64m2_t test_vle64_v_i64m2_m(vbool32_t mask, vint64m2_t maskedoff, const int6 return vle64_v_i64m2_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle64_v_i64m4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 4 x i64>* @@ -819,7 +746,6 @@ vint64m4_t test_vle64_v_i64m4_m(vbool16_t mask, vint64m4_t maskedoff, const int6 return vle64_v_i64m4_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle64_v_i64m8_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 8 x i64>* @@ -830,7 +756,6 @@ vint64m8_t test_vle64_v_i64m8_m(vbool8_t mask, vint64m8_t maskedoff, const int64 return vle64_v_i64m8_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_u8mf8_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 1 x i8>* @@ -841,7 +766,6 @@ vuint8mf8_t test_vle8_v_u8mf8_m(vbool64_t mask, vuint8mf8_t maskedoff, const uin return vle8_v_u8mf8_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_u8mf4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 2 x i8>* @@ -852,7 +776,6 @@ vuint8mf4_t test_vle8_v_u8mf4_m(vbool32_t mask, vuint8mf4_t maskedoff, const uin return vle8_v_u8mf4_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_u8mf2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 4 x i8>* @@ -863,7 +786,6 @@ vuint8mf2_t test_vle8_v_u8mf2_m(vbool16_t mask, vuint8mf2_t maskedoff, const uin return vle8_v_u8mf2_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_u8m1_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 8 x i8>* @@ -874,7 +796,6 @@ vuint8m1_t test_vle8_v_u8m1_m(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t return vle8_v_u8m1_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_u8m2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 16 x i8>* @@ -885,7 +806,6 @@ vuint8m2_t test_vle8_v_u8m2_m(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t return vle8_v_u8m2_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_u8m4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 32 x i8>* @@ -896,7 +816,6 @@ vuint8m4_t test_vle8_v_u8m4_m(vbool2_t mask, vuint8m4_t maskedoff, const uint8_t return vle8_v_u8m4_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle8_v_u8m8_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 64 x i8>* @@ -907,7 +826,6 @@ vuint8m8_t test_vle8_v_u8m8_m(vbool1_t mask, vuint8m8_t maskedoff, const uint8_t return vle8_v_u8m8_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle16_v_u16mf4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 1 x i16>* @@ -918,7 +836,6 @@ vuint16mf4_t test_vle16_v_u16mf4_m(vbool64_t mask, vuint16mf4_t maskedoff, const return vle16_v_u16mf4_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle16_v_u16mf2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 2 x i16>* @@ -929,7 +846,6 @@ vuint16mf2_t test_vle16_v_u16mf2_m(vbool32_t mask, vuint16mf2_t maskedoff, const return vle16_v_u16mf2_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle16_v_u16m1_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 4 x i16>* @@ -940,7 +856,6 @@ vuint16m1_t test_vle16_v_u16m1_m(vbool16_t mask, vuint16m1_t maskedoff, const ui return vle16_v_u16m1_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle16_v_u16m2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 8 x i16>* @@ -951,7 +866,6 @@ vuint16m2_t test_vle16_v_u16m2_m(vbool8_t mask, vuint16m2_t maskedoff, const uin return vle16_v_u16m2_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle16_v_u16m4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 16 x i16>* @@ -962,7 +876,6 @@ vuint16m4_t test_vle16_v_u16m4_m(vbool4_t mask, vuint16m4_t maskedoff, const uin return vle16_v_u16m4_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle16_v_u16m8_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 32 x i16>* @@ -973,7 +886,6 @@ vuint16m8_t test_vle16_v_u16m8_m(vbool2_t mask, vuint16m8_t maskedoff, const uin return vle16_v_u16m8_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_u32mf2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 1 x i32>* @@ -984,7 +896,6 @@ vuint32mf2_t test_vle32_v_u32mf2_m(vbool64_t mask, vuint32mf2_t maskedoff, const return vle32_v_u32mf2_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_u32m1_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 2 x i32>* @@ -995,7 +906,6 @@ vuint32m1_t test_vle32_v_u32m1_m(vbool32_t mask, vuint32m1_t maskedoff, const ui return vle32_v_u32m1_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_u32m2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 4 x i32>* @@ -1006,7 +916,6 @@ vuint32m2_t test_vle32_v_u32m2_m(vbool16_t mask, vuint32m2_t maskedoff, const ui return vle32_v_u32m2_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_u32m4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 8 x i32>* @@ -1017,7 +926,6 @@ vuint32m4_t test_vle32_v_u32m4_m(vbool8_t mask, vuint32m4_t maskedoff, const uin return vle32_v_u32m4_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_u32m8_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 16 x i32>* @@ -1028,7 +936,6 @@ vuint32m8_t test_vle32_v_u32m8_m(vbool4_t mask, vuint32m8_t maskedoff, const uin return vle32_v_u32m8_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle64_v_u64m1_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 1 x i64>* @@ -1039,7 +946,6 @@ vuint64m1_t test_vle64_v_u64m1_m(vbool64_t mask, vuint64m1_t maskedoff, const ui return vle64_v_u64m1_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle64_v_u64m2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 2 x i64>* @@ -1050,7 +956,6 @@ vuint64m2_t test_vle64_v_u64m2_m(vbool32_t mask, vuint64m2_t maskedoff, const ui return vle64_v_u64m2_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle64_v_u64m4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 4 x i64>* @@ -1061,7 +966,6 @@ vuint64m4_t test_vle64_v_u64m4_m(vbool16_t mask, vuint64m4_t maskedoff, const ui return vle64_v_u64m4_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle64_v_u64m8_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 8 x i64>* @@ -1072,7 +976,6 @@ vuint64m8_t test_vle64_v_u64m8_m(vbool8_t mask, vuint64m8_t maskedoff, const uin return vle64_v_u64m8_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_f32mf2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast float* [[BASE:%.*]] to <vscale x 1 x float>* @@ -1083,7 +986,6 @@ vfloat32mf2_t test_vle32_v_f32mf2_m(vbool64_t mask, vfloat32mf2_t maskedoff, con return vle32_v_f32mf2_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_f32m1_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast float* [[BASE:%.*]] to <vscale x 2 x float>* @@ -1094,7 +996,6 @@ vfloat32m1_t test_vle32_v_f32m1_m(vbool32_t mask, vfloat32m1_t maskedoff, const return vle32_v_f32m1_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_f32m2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast float* [[BASE:%.*]] to <vscale x 4 x float>* @@ -1105,7 +1006,6 @@ vfloat32m2_t test_vle32_v_f32m2_m(vbool16_t mask, vfloat32m2_t maskedoff, const return vle32_v_f32m2_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_f32m4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast float* [[BASE:%.*]] to <vscale x 8 x float>* @@ -1116,7 +1016,6 @@ vfloat32m4_t test_vle32_v_f32m4_m(vbool8_t mask, vfloat32m4_t maskedoff, const f return vle32_v_f32m4_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle32_v_f32m8_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast float* [[BASE:%.*]] to <vscale x 16 x float>* @@ -1127,7 +1026,6 @@ vfloat32m8_t test_vle32_v_f32m8_m(vbool4_t mask, vfloat32m8_t maskedoff, const f return vle32_v_f32m8_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle64_v_f64m1_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast double* [[BASE:%.*]] to <vscale x 1 x double>* @@ -1138,7 +1036,6 @@ vfloat64m1_t test_vle64_v_f64m1_m(vbool64_t mask, vfloat64m1_t maskedoff, const return vle64_v_f64m1_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle64_v_f64m2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast double* [[BASE:%.*]] to <vscale x 2 x double>* @@ -1149,7 +1046,6 @@ vfloat64m2_t test_vle64_v_f64m2_m(vbool32_t mask, vfloat64m2_t maskedoff, const return vle64_v_f64m2_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle64_v_f64m4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast double* [[BASE:%.*]] to <vscale x 4 x double>* @@ -1160,7 +1056,6 @@ vfloat64m4_t test_vle64_v_f64m4_m(vbool16_t mask, vfloat64m4_t maskedoff, const return vle64_v_f64m4_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle64_v_f64m8_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast double* [[BASE:%.*]] to <vscale x 8 x double>* @@ -1171,7 +1066,6 @@ vfloat64m8_t test_vle64_v_f64m8_m(vbool8_t mask, vfloat64m8_t maskedoff, const d return vle64_v_f64m8_m(mask, maskedoff, base, vl); } -// // CHECK-RV64-LABEL: @test_vle1_v_b1( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 64 x i1>* @@ -1182,7 +1076,6 @@ vbool1_t test_vle1_v_b1(const uint8_t *base, size_t vl) { return vle1_v_b1(base, vl); } -// // CHECK-RV64-LABEL: @test_vle1_v_b2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 32 x i1>* @@ -1193,7 +1086,6 @@ vbool2_t test_vle1_v_b2(const uint8_t *base, size_t vl) { return vle1_v_b2(base, vl); } -// // CHECK-RV64-LABEL: @test_vle1_v_b4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 16 x i1>* @@ -1204,7 +1096,6 @@ vbool4_t test_vle1_v_b4(const uint8_t *base, size_t vl) { return vle1_v_b4(base, vl); } -// // CHECK-RV64-LABEL: @test_vle1_v_b8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 8 x i1>* @@ -1215,7 +1106,6 @@ vbool8_t test_vle1_v_b8(const uint8_t *base, size_t vl) { return vle1_v_b8(base, vl); } -// // CHECK-RV64-LABEL: @test_vle1_v_b16( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 4 x i1>* @@ -1226,7 +1116,6 @@ vbool16_t test_vle1_v_b16(const uint8_t *base, size_t vl) { return vle1_v_b16(base, vl); } -// // CHECK-RV64-LABEL: @test_vle1_v_b32( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 2 x i1>* @@ -1237,7 +1126,6 @@ vbool32_t test_vle1_v_b32(const uint8_t *base, size_t vl) { return vle1_v_b32(base, vl); } -// // CHECK-RV64-LABEL: @test_vle1_v_b64( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 1 x i1>* @@ -1247,3 +1135,63 @@ vbool32_t test_vle1_v_b32(const uint8_t *base, size_t vl) { vbool64_t test_vle1_v_b64(const uint8_t *base, size_t vl) { return vle1_v_b64(base, vl); } + +// CHECK-RV64-LABEL: @test_vle16_v_f16mf4( +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast half* [[BASE:%.*]] to <vscale x 1 x half>* +// CHECK-RV64-NEXT: [[TMP1:%.*]] = call <vscale x 1 x half> @llvm.riscv.vle.nxv1f16.i64(<vscale x 1 x half>* [[TMP0]], i64 [[VL:%.*]]) +// CHECK-RV64-NEXT: ret <vscale x 1 x half> [[TMP1]] +// +vfloat16mf4_t test_vle16_v_f16mf4(const _Float16 *base, size_t vl) { + return vle16_v_f16mf4(base, vl); +} + +// CHECK-RV64-LABEL: @test_vle16_v_f16mf2( +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast half* [[BASE:%.*]] to <vscale x 2 x half>* +// CHECK-RV64-NEXT: [[TMP1:%.*]] = call <vscale x 2 x half> @llvm.riscv.vle.nxv2f16.i64(<vscale x 2 x half>* [[TMP0]], i64 [[VL:%.*]]) +// CHECK-RV64-NEXT: ret <vscale x 2 x half> [[TMP1]] +// +vfloat16mf2_t test_vle16_v_f16mf2(const _Float16 *base, size_t vl) { + return vle16_v_f16mf2(base, vl); +} + +// CHECK-RV64-LABEL: @test_vle16_v_f16m1( +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast half* [[BASE:%.*]] to <vscale x 4 x half>* +// CHECK-RV64-NEXT: [[TMP1:%.*]] = call <vscale x 4 x half> @llvm.riscv.vle.nxv4f16.i64(<vscale x 4 x half>* [[TMP0]], i64 [[VL:%.*]]) +// CHECK-RV64-NEXT: ret <vscale x 4 x half> [[TMP1]] +// +vfloat16m1_t test_vle16_v_f16m1(const _Float16 *base, size_t vl) { + return vle16_v_f16m1(base, vl); +} + +// CHECK-RV64-LABEL: @test_vle16_v_f16m2( +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast half* [[BASE:%.*]] to <vscale x 8 x half>* +// CHECK-RV64-NEXT: [[TMP1:%.*]] = call <vscale x 8 x half> @llvm.riscv.vle.nxv8f16.i64(<vscale x 8 x half>* [[TMP0]], i64 [[VL:%.*]]) +// CHECK-RV64-NEXT: ret <vscale x 8 x half> [[TMP1]] +// +vfloat16m2_t test_vle16_v_f16m2(const _Float16 *base, size_t vl) { + return vle16_v_f16m2(base, vl); +} + +// CHECK-RV64-LABEL: @test_vle16_v_f16m4( +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast half* [[BASE:%.*]] to <vscale x 16 x half>* +// CHECK-RV64-NEXT: [[TMP1:%.*]] = call <vscale x 16 x half> @llvm.riscv.vle.nxv16f16.i64(<vscale x 16 x half>* [[TMP0]], i64 [[VL:%.*]]) +// CHECK-RV64-NEXT: ret <vscale x 16 x half> [[TMP1]] +// +vfloat16m4_t test_vle16_v_f16m4(const _Float16 *base, size_t vl) { + return vle16_v_f16m4(base, vl); +} + +// CHECK-RV64-LABEL: @test_vle16_v_f16m8( +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast half* [[BASE:%.*]] to <vscale x 32 x half>* +// CHECK-RV64-NEXT: [[TMP1:%.*]] = call <vscale x 32 x half> @llvm.riscv.vle.nxv32f16.i64(<vscale x 32 x half>* [[TMP0]], i64 [[VL:%.*]]) +// CHECK-RV64-NEXT: ret <vscale x 32 x half> [[TMP1]] +// +vfloat16m8_t test_vle16_v_f16m8(const _Float16 *base, size_t vl) { + return vle16_v_f16m8(base, vl); +} diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics/vse.c b/clang/test/CodeGen/RISCV/rvv-intrinsics/vse.c index 2c7414cf2cf4e..cdf62055c2b41 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics/vse.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics/vse.c @@ -1,11 +1,11 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: riscv-registered-target -// RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d -target-feature +experimental-v \ -// RUN: -disable-O0-optnone -emit-llvm %s -o - | opt -S -mem2reg | FileCheck --check-prefix=CHECK-RV64 %s +// RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d \ +// RUN: -target-feature +experimental-v -target-feature +experimental-zfh \ +// RUN: -disable-O0-optnone -emit-llvm %s -o - | opt -S -mem2reg | FileCheck --check-prefix=CHECK-RV64 %s #include <riscv_vector.h> -// // CHECK-RV64-LABEL: @test_vse8_v_i8mf8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 1 x i8>* @@ -16,7 +16,6 @@ void test_vse8_v_i8mf8(int8_t *base, vint8mf8_t value, size_t vl) { return vse8_v_i8mf8(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_i8mf4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 2 x i8>* @@ -27,7 +26,6 @@ void test_vse8_v_i8mf4(int8_t *base, vint8mf4_t value, size_t vl) { return vse8_v_i8mf4(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_i8mf2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 4 x i8>* @@ -38,7 +36,6 @@ void test_vse8_v_i8mf2(int8_t *base, vint8mf2_t value, size_t vl) { return vse8_v_i8mf2(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_i8m1( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 8 x i8>* @@ -49,7 +46,6 @@ void test_vse8_v_i8m1(int8_t *base, vint8m1_t value, size_t vl) { return vse8_v_i8m1(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_i8m2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 16 x i8>* @@ -60,7 +56,6 @@ void test_vse8_v_i8m2(int8_t *base, vint8m2_t value, size_t vl) { return vse8_v_i8m2(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_i8m4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 32 x i8>* @@ -71,7 +66,6 @@ void test_vse8_v_i8m4(int8_t *base, vint8m4_t value, size_t vl) { return vse8_v_i8m4(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_i8m8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 64 x i8>* @@ -82,7 +76,6 @@ void test_vse8_v_i8m8(int8_t *base, vint8m8_t value, size_t vl) { return vse8_v_i8m8(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse16_v_i16mf4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 1 x i16>* @@ -93,7 +86,6 @@ void test_vse16_v_i16mf4(int16_t *base, vint16mf4_t value, size_t vl) { return vse16_v_i16mf4(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse16_v_i16mf2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 2 x i16>* @@ -104,7 +96,6 @@ void test_vse16_v_i16mf2(int16_t *base, vint16mf2_t value, size_t vl) { return vse16_v_i16mf2(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse16_v_i16m1( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 4 x i16>* @@ -115,7 +106,6 @@ void test_vse16_v_i16m1(int16_t *base, vint16m1_t value, size_t vl) { return vse16_v_i16m1(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse16_v_i16m2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 8 x i16>* @@ -126,7 +116,6 @@ void test_vse16_v_i16m2(int16_t *base, vint16m2_t value, size_t vl) { return vse16_v_i16m2(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse16_v_i16m4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 16 x i16>* @@ -137,7 +126,6 @@ void test_vse16_v_i16m4(int16_t *base, vint16m4_t value, size_t vl) { return vse16_v_i16m4(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse16_v_i16m8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 32 x i16>* @@ -148,7 +136,6 @@ void test_vse16_v_i16m8(int16_t *base, vint16m8_t value, size_t vl) { return vse16_v_i16m8(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_i32mf2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 1 x i32>* @@ -159,7 +146,6 @@ void test_vse32_v_i32mf2(int32_t *base, vint32mf2_t value, size_t vl) { return vse32_v_i32mf2(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_i32m1( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 2 x i32>* @@ -170,7 +156,6 @@ void test_vse32_v_i32m1(int32_t *base, vint32m1_t value, size_t vl) { return vse32_v_i32m1(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_i32m2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 4 x i32>* @@ -181,7 +166,6 @@ void test_vse32_v_i32m2(int32_t *base, vint32m2_t value, size_t vl) { return vse32_v_i32m2(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_i32m4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 8 x i32>* @@ -192,7 +176,6 @@ void test_vse32_v_i32m4(int32_t *base, vint32m4_t value, size_t vl) { return vse32_v_i32m4(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_i32m8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 16 x i32>* @@ -203,7 +186,6 @@ void test_vse32_v_i32m8(int32_t *base, vint32m8_t value, size_t vl) { return vse32_v_i32m8(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse64_v_i64m1( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 1 x i64>* @@ -214,7 +196,6 @@ void test_vse64_v_i64m1(int64_t *base, vint64m1_t value, size_t vl) { return vse64_v_i64m1(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse64_v_i64m2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 2 x i64>* @@ -225,7 +206,6 @@ void test_vse64_v_i64m2(int64_t *base, vint64m2_t value, size_t vl) { return vse64_v_i64m2(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse64_v_i64m4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 4 x i64>* @@ -236,7 +216,6 @@ void test_vse64_v_i64m4(int64_t *base, vint64m4_t value, size_t vl) { return vse64_v_i64m4(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse64_v_i64m8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 8 x i64>* @@ -247,7 +226,6 @@ void test_vse64_v_i64m8(int64_t *base, vint64m8_t value, size_t vl) { return vse64_v_i64m8(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_u8mf8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 1 x i8>* @@ -258,7 +236,6 @@ void test_vse8_v_u8mf8(uint8_t *base, vuint8mf8_t value, size_t vl) { return vse8_v_u8mf8(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_u8mf4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 2 x i8>* @@ -269,7 +246,6 @@ void test_vse8_v_u8mf4(uint8_t *base, vuint8mf4_t value, size_t vl) { return vse8_v_u8mf4(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_u8mf2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 4 x i8>* @@ -280,7 +256,6 @@ void test_vse8_v_u8mf2(uint8_t *base, vuint8mf2_t value, size_t vl) { return vse8_v_u8mf2(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_u8m1( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 8 x i8>* @@ -291,7 +266,6 @@ void test_vse8_v_u8m1(uint8_t *base, vuint8m1_t value, size_t vl) { return vse8_v_u8m1(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_u8m2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 16 x i8>* @@ -302,7 +276,6 @@ void test_vse8_v_u8m2(uint8_t *base, vuint8m2_t value, size_t vl) { return vse8_v_u8m2(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_u8m4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 32 x i8>* @@ -313,7 +286,6 @@ void test_vse8_v_u8m4(uint8_t *base, vuint8m4_t value, size_t vl) { return vse8_v_u8m4(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_u8m8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 64 x i8>* @@ -324,7 +296,6 @@ void test_vse8_v_u8m8(uint8_t *base, vuint8m8_t value, size_t vl) { return vse8_v_u8m8(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse16_v_u16mf4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 1 x i16>* @@ -335,7 +306,6 @@ void test_vse16_v_u16mf4(uint16_t *base, vuint16mf4_t value, size_t vl) { return vse16_v_u16mf4(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse16_v_u16mf2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 2 x i16>* @@ -346,7 +316,6 @@ void test_vse16_v_u16mf2(uint16_t *base, vuint16mf2_t value, size_t vl) { return vse16_v_u16mf2(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse16_v_u16m1( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 4 x i16>* @@ -357,7 +326,6 @@ void test_vse16_v_u16m1(uint16_t *base, vuint16m1_t value, size_t vl) { return vse16_v_u16m1(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse16_v_u16m2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 8 x i16>* @@ -368,7 +336,6 @@ void test_vse16_v_u16m2(uint16_t *base, vuint16m2_t value, size_t vl) { return vse16_v_u16m2(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse16_v_u16m4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 16 x i16>* @@ -379,7 +346,6 @@ void test_vse16_v_u16m4(uint16_t *base, vuint16m4_t value, size_t vl) { return vse16_v_u16m4(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse16_v_u16m8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 32 x i16>* @@ -390,7 +356,6 @@ void test_vse16_v_u16m8(uint16_t *base, vuint16m8_t value, size_t vl) { return vse16_v_u16m8(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_u32mf2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 1 x i32>* @@ -401,7 +366,6 @@ void test_vse32_v_u32mf2(uint32_t *base, vuint32mf2_t value, size_t vl) { return vse32_v_u32mf2(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_u32m1( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 2 x i32>* @@ -412,7 +376,6 @@ void test_vse32_v_u32m1(uint32_t *base, vuint32m1_t value, size_t vl) { return vse32_v_u32m1(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_u32m2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 4 x i32>* @@ -423,7 +386,6 @@ void test_vse32_v_u32m2(uint32_t *base, vuint32m2_t value, size_t vl) { return vse32_v_u32m2(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_u32m4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 8 x i32>* @@ -434,7 +396,6 @@ void test_vse32_v_u32m4(uint32_t *base, vuint32m4_t value, size_t vl) { return vse32_v_u32m4(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_u32m8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 16 x i32>* @@ -445,7 +406,6 @@ void test_vse32_v_u32m8(uint32_t *base, vuint32m8_t value, size_t vl) { return vse32_v_u32m8(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse64_v_u64m1( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 1 x i64>* @@ -456,7 +416,6 @@ void test_vse64_v_u64m1(uint64_t *base, vuint64m1_t value, size_t vl) { return vse64_v_u64m1(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse64_v_u64m2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 2 x i64>* @@ -467,7 +426,6 @@ void test_vse64_v_u64m2(uint64_t *base, vuint64m2_t value, size_t vl) { return vse64_v_u64m2(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse64_v_u64m4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 4 x i64>* @@ -478,7 +436,6 @@ void test_vse64_v_u64m4(uint64_t *base, vuint64m4_t value, size_t vl) { return vse64_v_u64m4(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse64_v_u64m8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 8 x i64>* @@ -489,7 +446,6 @@ void test_vse64_v_u64m8(uint64_t *base, vuint64m8_t value, size_t vl) { return vse64_v_u64m8(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_f32mf2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast float* [[BASE:%.*]] to <vscale x 1 x float>* @@ -500,7 +456,6 @@ void test_vse32_v_f32mf2(float *base, vfloat32mf2_t value, size_t vl) { return vse32_v_f32mf2(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_f32m1( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast float* [[BASE:%.*]] to <vscale x 2 x float>* @@ -511,7 +466,6 @@ void test_vse32_v_f32m1(float *base, vfloat32m1_t value, size_t vl) { return vse32_v_f32m1(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_f32m2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast float* [[BASE:%.*]] to <vscale x 4 x float>* @@ -522,7 +476,6 @@ void test_vse32_v_f32m2(float *base, vfloat32m2_t value, size_t vl) { return vse32_v_f32m2(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_f32m4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast float* [[BASE:%.*]] to <vscale x 8 x float>* @@ -533,7 +486,6 @@ void test_vse32_v_f32m4(float *base, vfloat32m4_t value, size_t vl) { return vse32_v_f32m4(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_f32m8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast float* [[BASE:%.*]] to <vscale x 16 x float>* @@ -544,7 +496,6 @@ void test_vse32_v_f32m8(float *base, vfloat32m8_t value, size_t vl) { return vse32_v_f32m8(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse64_v_f64m1( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast double* [[BASE:%.*]] to <vscale x 1 x double>* @@ -555,7 +506,6 @@ void test_vse64_v_f64m1(double *base, vfloat64m1_t value, size_t vl) { return vse64_v_f64m1(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse64_v_f64m2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast double* [[BASE:%.*]] to <vscale x 2 x double>* @@ -566,7 +516,6 @@ void test_vse64_v_f64m2(double *base, vfloat64m2_t value, size_t vl) { return vse64_v_f64m2(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse64_v_f64m4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast double* [[BASE:%.*]] to <vscale x 4 x double>* @@ -577,7 +526,6 @@ void test_vse64_v_f64m4(double *base, vfloat64m4_t value, size_t vl) { return vse64_v_f64m4(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse64_v_f64m8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast double* [[BASE:%.*]] to <vscale x 8 x double>* @@ -588,7 +536,6 @@ void test_vse64_v_f64m8(double *base, vfloat64m8_t value, size_t vl) { return vse64_v_f64m8(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_i8mf8_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 1 x i8>* @@ -599,7 +546,6 @@ void test_vse8_v_i8mf8_m(vbool64_t mask, int8_t *base, vint8mf8_t value, size_t return vse8_v_i8mf8_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_i8mf4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 2 x i8>* @@ -610,7 +556,6 @@ void test_vse8_v_i8mf4_m(vbool32_t mask, int8_t *base, vint8mf4_t value, size_t return vse8_v_i8mf4_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_i8mf2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 4 x i8>* @@ -621,7 +566,6 @@ void test_vse8_v_i8mf2_m(vbool16_t mask, int8_t *base, vint8mf2_t value, size_t return vse8_v_i8mf2_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_i8m1_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 8 x i8>* @@ -632,7 +576,6 @@ void test_vse8_v_i8m1_m(vbool8_t mask, int8_t *base, vint8m1_t value, size_t vl) return vse8_v_i8m1_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_i8m2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 16 x i8>* @@ -643,7 +586,6 @@ void test_vse8_v_i8m2_m(vbool4_t mask, int8_t *base, vint8m2_t value, size_t vl) return vse8_v_i8m2_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_i8m4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 32 x i8>* @@ -654,7 +596,6 @@ void test_vse8_v_i8m4_m(vbool2_t mask, int8_t *base, vint8m4_t value, size_t vl) return vse8_v_i8m4_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_i8m8_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 64 x i8>* @@ -665,7 +606,6 @@ void test_vse8_v_i8m8_m(vbool1_t mask, int8_t *base, vint8m8_t value, size_t vl) return vse8_v_i8m8_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse16_v_i16mf4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 1 x i16>* @@ -676,7 +616,6 @@ void test_vse16_v_i16mf4_m(vbool64_t mask, int16_t *base, vint16mf4_t value, siz return vse16_v_i16mf4_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse16_v_i16mf2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 2 x i16>* @@ -687,7 +626,6 @@ void test_vse16_v_i16mf2_m(vbool32_t mask, int16_t *base, vint16mf2_t value, siz return vse16_v_i16mf2_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse16_v_i16m1_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 4 x i16>* @@ -698,7 +636,6 @@ void test_vse16_v_i16m1_m(vbool16_t mask, int16_t *base, vint16m1_t value, size_ return vse16_v_i16m1_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse16_v_i16m2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 8 x i16>* @@ -709,7 +646,6 @@ void test_vse16_v_i16m2_m(vbool8_t mask, int16_t *base, vint16m2_t value, size_t return vse16_v_i16m2_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse16_v_i16m4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 16 x i16>* @@ -720,7 +656,6 @@ void test_vse16_v_i16m4_m(vbool4_t mask, int16_t *base, vint16m4_t value, size_t return vse16_v_i16m4_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse16_v_i16m8_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 32 x i16>* @@ -731,7 +666,6 @@ void test_vse16_v_i16m8_m(vbool2_t mask, int16_t *base, vint16m8_t value, size_t return vse16_v_i16m8_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_i32mf2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 1 x i32>* @@ -742,7 +676,6 @@ void test_vse32_v_i32mf2_m(vbool64_t mask, int32_t *base, vint32mf2_t value, siz return vse32_v_i32mf2_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_i32m1_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 2 x i32>* @@ -753,7 +686,6 @@ void test_vse32_v_i32m1_m(vbool32_t mask, int32_t *base, vint32m1_t value, size_ return vse32_v_i32m1_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_i32m2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 4 x i32>* @@ -764,7 +696,6 @@ void test_vse32_v_i32m2_m(vbool16_t mask, int32_t *base, vint32m2_t value, size_ return vse32_v_i32m2_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_i32m4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 8 x i32>* @@ -775,7 +706,6 @@ void test_vse32_v_i32m4_m(vbool8_t mask, int32_t *base, vint32m4_t value, size_t return vse32_v_i32m4_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_i32m8_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 16 x i32>* @@ -786,7 +716,6 @@ void test_vse32_v_i32m8_m(vbool4_t mask, int32_t *base, vint32m8_t value, size_t return vse32_v_i32m8_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse64_v_i64m1_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 1 x i64>* @@ -797,7 +726,6 @@ void test_vse64_v_i64m1_m(vbool64_t mask, int64_t *base, vint64m1_t value, size_ return vse64_v_i64m1_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse64_v_i64m2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 2 x i64>* @@ -808,7 +736,6 @@ void test_vse64_v_i64m2_m(vbool32_t mask, int64_t *base, vint64m2_t value, size_ return vse64_v_i64m2_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse64_v_i64m4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 4 x i64>* @@ -819,7 +746,6 @@ void test_vse64_v_i64m4_m(vbool16_t mask, int64_t *base, vint64m4_t value, size_ return vse64_v_i64m4_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse64_v_i64m8_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 8 x i64>* @@ -830,7 +756,6 @@ void test_vse64_v_i64m8_m(vbool8_t mask, int64_t *base, vint64m8_t value, size_t return vse64_v_i64m8_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_u8mf8_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 1 x i8>* @@ -841,7 +766,6 @@ void test_vse8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t value, size_ return vse8_v_u8mf8_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_u8mf4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 2 x i8>* @@ -852,7 +776,6 @@ void test_vse8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t value, size_ return vse8_v_u8mf4_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_u8mf2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 4 x i8>* @@ -863,7 +786,6 @@ void test_vse8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t value, size_ return vse8_v_u8mf2_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_u8m1_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 8 x i8>* @@ -874,7 +796,6 @@ void test_vse8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t value, size_t v return vse8_v_u8m1_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_u8m2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 16 x i8>* @@ -885,7 +806,6 @@ void test_vse8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t value, size_t v return vse8_v_u8m2_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_u8m4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 32 x i8>* @@ -896,7 +816,6 @@ void test_vse8_v_u8m4_m(vbool2_t mask, uint8_t *base, vuint8m4_t value, size_t v return vse8_v_u8m4_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse8_v_u8m8_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 64 x i8>* @@ -907,7 +826,6 @@ void test_vse8_v_u8m8_m(vbool1_t mask, uint8_t *base, vuint8m8_t value, size_t v return vse8_v_u8m8_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse16_v_u16mf4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 1 x i16>* @@ -918,7 +836,6 @@ void test_vse16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t value, s return vse16_v_u16mf4_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse16_v_u16mf2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 2 x i16>* @@ -929,7 +846,6 @@ void test_vse16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t value, s return vse16_v_u16mf2_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse16_v_u16m1_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 4 x i16>* @@ -940,7 +856,6 @@ void test_vse16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t value, siz return vse16_v_u16m1_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse16_v_u16m2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 8 x i16>* @@ -951,7 +866,6 @@ void test_vse16_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint16m2_t value, size return vse16_v_u16m2_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse16_v_u16m4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 16 x i16>* @@ -962,7 +876,6 @@ void test_vse16_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint16m4_t value, size return vse16_v_u16m4_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse16_v_u16m8_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i16* [[BASE:%.*]] to <vscale x 32 x i16>* @@ -973,7 +886,6 @@ void test_vse16_v_u16m8_m(vbool2_t mask, uint16_t *base, vuint16m8_t value, size return vse16_v_u16m8_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_u32mf2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 1 x i32>* @@ -984,7 +896,6 @@ void test_vse32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t value, s return vse32_v_u32mf2_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_u32m1_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 2 x i32>* @@ -995,7 +906,6 @@ void test_vse32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t value, siz return vse32_v_u32m1_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_u32m2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 4 x i32>* @@ -1006,7 +916,6 @@ void test_vse32_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint32m2_t value, siz return vse32_v_u32m2_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_u32m4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 8 x i32>* @@ -1017,7 +926,6 @@ void test_vse32_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint32m4_t value, size return vse32_v_u32m4_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_u32m8_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i32* [[BASE:%.*]] to <vscale x 16 x i32>* @@ -1028,7 +936,6 @@ void test_vse32_v_u32m8_m(vbool4_t mask, uint32_t *base, vuint32m8_t value, size return vse32_v_u32m8_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse64_v_u64m1_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 1 x i64>* @@ -1039,7 +946,6 @@ void test_vse64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t value, siz return vse64_v_u64m1_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse64_v_u64m2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 2 x i64>* @@ -1050,7 +956,6 @@ void test_vse64_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint64m2_t value, siz return vse64_v_u64m2_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse64_v_u64m4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 4 x i64>* @@ -1061,7 +966,6 @@ void test_vse64_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint64m4_t value, siz return vse64_v_u64m4_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse64_v_u64m8_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i64* [[BASE:%.*]] to <vscale x 8 x i64>* @@ -1072,7 +976,6 @@ void test_vse64_v_u64m8_m(vbool8_t mask, uint64_t *base, vuint64m8_t value, size return vse64_v_u64m8_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_f32mf2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast float* [[BASE:%.*]] to <vscale x 1 x float>* @@ -1083,7 +986,6 @@ void test_vse32_v_f32mf2_m(vbool64_t mask, float *base, vfloat32mf2_t value, siz return vse32_v_f32mf2_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_f32m1_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast float* [[BASE:%.*]] to <vscale x 2 x float>* @@ -1094,7 +996,6 @@ void test_vse32_v_f32m1_m(vbool32_t mask, float *base, vfloat32m1_t value, size_ return vse32_v_f32m1_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_f32m2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast float* [[BASE:%.*]] to <vscale x 4 x float>* @@ -1105,7 +1006,6 @@ void test_vse32_v_f32m2_m(vbool16_t mask, float *base, vfloat32m2_t value, size_ return vse32_v_f32m2_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_f32m4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast float* [[BASE:%.*]] to <vscale x 8 x float>* @@ -1116,7 +1016,6 @@ void test_vse32_v_f32m4_m(vbool8_t mask, float *base, vfloat32m4_t value, size_t return vse32_v_f32m4_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse32_v_f32m8_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast float* [[BASE:%.*]] to <vscale x 16 x float>* @@ -1127,7 +1026,6 @@ void test_vse32_v_f32m8_m(vbool4_t mask, float *base, vfloat32m8_t value, size_t return vse32_v_f32m8_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse64_v_f64m1_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast double* [[BASE:%.*]] to <vscale x 1 x double>* @@ -1138,7 +1036,6 @@ void test_vse64_v_f64m1_m(vbool64_t mask, double *base, vfloat64m1_t value, size return vse64_v_f64m1_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse64_v_f64m2_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast double* [[BASE:%.*]] to <vscale x 2 x double>* @@ -1149,7 +1046,6 @@ void test_vse64_v_f64m2_m(vbool32_t mask, double *base, vfloat64m2_t value, size return vse64_v_f64m2_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse64_v_f64m4_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast double* [[BASE:%.*]] to <vscale x 4 x double>* @@ -1160,7 +1056,6 @@ void test_vse64_v_f64m4_m(vbool16_t mask, double *base, vfloat64m4_t value, size return vse64_v_f64m4_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse64_v_f64m8_m( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast double* [[BASE:%.*]] to <vscale x 8 x double>* @@ -1171,7 +1066,6 @@ void test_vse64_v_f64m8_m(vbool8_t mask, double *base, vfloat64m8_t value, size_ return vse64_v_f64m8_m(mask, base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse1_v_b1( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 64 x i1>* @@ -1182,7 +1076,6 @@ void test_vse1_v_b1(uint8_t *base, vbool1_t value, size_t vl) { return vse1_v_b1(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse1_v_b2( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 32 x i1>* @@ -1193,7 +1086,6 @@ void test_vse1_v_b2(uint8_t *base, vbool2_t value, size_t vl) { return vse1_v_b2(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse1_v_b4( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 16 x i1>* @@ -1204,7 +1096,6 @@ void test_vse1_v_b4(uint8_t *base, vbool4_t value, size_t vl) { return vse1_v_b4(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse1_v_b8( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 8 x i1>* @@ -1215,7 +1106,6 @@ void test_vse1_v_b8(uint8_t *base, vbool8_t value, size_t vl) { return vse1_v_b8(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse1_v_b16( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 4 x i1>* @@ -1226,7 +1116,6 @@ void test_vse1_v_b16(uint8_t *base, vbool16_t value, size_t vl) { return vse1_v_b16(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse1_v_b32( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 2 x i1>* @@ -1237,7 +1126,6 @@ void test_vse1_v_b32(uint8_t *base, vbool32_t value, size_t vl) { return vse1_v_b32(base, value, vl); } -// // CHECK-RV64-LABEL: @test_vse1_v_b64( // CHECK-RV64-NEXT: entry: // CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to <vscale x 1 x i1>* @@ -1247,3 +1135,63 @@ void test_vse1_v_b32(uint8_t *base, vbool32_t value, size_t vl) { void test_vse1_v_b64(uint8_t *base, vbool64_t value, size_t vl) { return vse1_v_b64(base, value, vl); } + +// CHECK-RV64-LABEL: @test_vse16_v_f16mf4( +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast half* [[BASE:%.*]] to <vscale x 1 x half>* +// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv1f16.i64(<vscale x 1 x half> [[VALUE:%.*]], <vscale x 1 x half>* [[TMP0]], i64 [[VL:%.*]]) +// CHECK-RV64-NEXT: ret void +// +void test_vse16_v_f16mf4(_Float16 *base, vfloat16mf4_t value, size_t vl) { + return vse16_v_f16mf4(base, value, vl); +} + +// CHECK-RV64-LABEL: @test_vse16_v_f16mf2( +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast half* [[BASE:%.*]] to <vscale x 2 x half>* +// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv2f16.i64(<vscale x 2 x half> [[VALUE:%.*]], <vscale x 2 x half>* [[TMP0]], i64 [[VL:%.*]]) +// CHECK-RV64-NEXT: ret void +// +void test_vse16_v_f16mf2(_Float16 *base, vfloat16mf2_t value, size_t vl) { + return vse16_v_f16mf2(base, value, vl); +} + +// CHECK-RV64-LABEL: @test_vse16_v_f16m1( +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast half* [[BASE:%.*]] to <vscale x 4 x half>* +// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv4f16.i64(<vscale x 4 x half> [[VALUE:%.*]], <vscale x 4 x half>* [[TMP0]], i64 [[VL:%.*]]) +// CHECK-RV64-NEXT: ret void +// +void test_vse16_v_f16m1(_Float16 *base, vfloat16m1_t value, size_t vl) { + return vse16_v_f16m1(base, value, vl); +} + +// CHECK-RV64-LABEL: @test_vse16_v_f16m2( +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast half* [[BASE:%.*]] to <vscale x 8 x half>* +// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv8f16.i64(<vscale x 8 x half> [[VALUE:%.*]], <vscale x 8 x half>* [[TMP0]], i64 [[VL:%.*]]) +// CHECK-RV64-NEXT: ret void +// +void test_vse16_v_f16m2(_Float16 *base, vfloat16m2_t value, size_t vl) { + return vse16_v_f16m2(base, value, vl); +} + +// CHECK-RV64-LABEL: @test_vse16_v_f16m4( +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast half* [[BASE:%.*]] to <vscale x 16 x half>* +// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv16f16.i64(<vscale x 16 x half> [[VALUE:%.*]], <vscale x 16 x half>* [[TMP0]], i64 [[VL:%.*]]) +// CHECK-RV64-NEXT: ret void +// +void test_vse16_v_f16m4(_Float16 *base, vfloat16m4_t value, size_t vl) { + return vse16_v_f16m4(base, value, vl); +} + +// CHECK-RV64-LABEL: @test_vse16_v_f16m8( +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = bitcast half* [[BASE:%.*]] to <vscale x 32 x half>* +// CHECK-RV64-NEXT: call void @llvm.riscv.vse.nxv32f16.i64(<vscale x 32 x half> [[VALUE:%.*]], <vscale x 32 x half>* [[TMP0]], i64 [[VL:%.*]]) +// CHECK-RV64-NEXT: ret void +// +void test_vse16_v_f16m8(_Float16 *base, vfloat16m8_t value, size_t vl) { + return vse16_v_f16m8(base, value, vl); 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