Author: Esme-Yi Date: 2021-01-11T03:52:16Z New Revision: ffa67873a3f93a6baa0046221edd08a90b0db6f8
URL: https://github.com/llvm/llvm-project/commit/ffa67873a3f93a6baa0046221edd08a90b0db6f8 DIFF: https://github.com/llvm/llvm-project/commit/ffa67873a3f93a6baa0046221edd08a90b0db6f8.diff LOG: [PowerPC] Add variants of 64-bit vector types for vec_sel. Summary: This patch added variants of vec_sel and fixed bugzilla 46770. Reviewed By: nemanjai Differential Revision: https://reviews.llvm.org/D94162 Added: Modified: clang/lib/Headers/altivec.h clang/test/CodeGen/builtins-ppc-vsx.c Removed: ################################################################################ diff --git a/clang/lib/Headers/altivec.h b/clang/lib/Headers/altivec.h index 2b82113de311..4d50d47d51b5 100644 --- a/clang/lib/Headers/altivec.h +++ b/clang/lib/Headers/altivec.h @@ -8281,6 +8281,46 @@ vec_sel(vector double __a, vector double __b, vector unsigned long long __c) { ((vector long long)__b & (vector long long)__c); return (vector double)__res; } + +static __inline__ vector bool long long __ATTRS_o_ai +vec_sel(vector bool long long __a, vector bool long long __b, + vector bool long long __c) { + return (__a & ~__c) | (__b & __c); +} + +static __inline__ vector bool long long __ATTRS_o_ai +vec_sel(vector bool long long __a, vector bool long long __b, + vector unsigned long long __c) { + return (__a & ~(vector bool long long)__c) | + (__b & (vector bool long long)__c); +} + +static __inline__ vector signed long long __ATTRS_o_ai +vec_sel(vector signed long long __a, vector signed long long __b, + vector bool long long __c) { + return (__a & ~(vector signed long long)__c) | + (__b & (vector signed long long)__c); +} + +static __inline__ vector signed long long __ATTRS_o_ai +vec_sel(vector signed long long __a, vector signed long long __b, + vector unsigned long long __c) { + return (__a & ~(vector signed long long)__c) | + (__b & (vector signed long long)__c); +} + +static __inline__ vector unsigned long long __ATTRS_o_ai +vec_sel(vector unsigned long long __a, vector unsigned long long __b, + vector bool long long __c) { + return (__a & ~(vector unsigned long long)__c) | + (__b & (vector unsigned long long)__c); +} + +static __inline__ vector unsigned long long __ATTRS_o_ai +vec_sel(vector unsigned long long __a, vector unsigned long long __b, + vector unsigned long long __c) { + return (__a & ~__c) | (__b & __c); +} #endif /* vec_vsel */ diff --git a/clang/test/CodeGen/builtins-ppc-vsx.c b/clang/test/CodeGen/builtins-ppc-vsx.c index cb9d484b5a77..bd0e66e69800 100644 --- a/clang/test/CodeGen/builtins-ppc-vsx.c +++ b/clang/test/CodeGen/builtins-ppc-vsx.c @@ -928,6 +928,66 @@ void test1() { // CHECK-LE: or <2 x i64> // CHECK-LE: bitcast <2 x i64> %{{[0-9]+}} to <2 x double> + res_vbll = vec_sel(vbll, vbll, vbll); +// CHECK: xor <2 x i64> %{{[0-9]+}}, <i64 -1, i64 -1> +// CHECK: and <2 x i64> %{{[0-9]+}}, +// CHECK: and <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} +// CHECK: or <2 x i64> +// CHECK-LE: xor <2 x i64> %{{[0-9]+}}, <i64 -1, i64 -1> +// CHECK-LE: and <2 x i64> %{{[0-9]+}}, +// CHECK-LE: and <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} +// CHECK-LE: or <2 x i64> + + res_vbll = vec_sel(vbll, vbll, vull); +// CHECK: xor <2 x i64> %{{[0-9]+}}, <i64 -1, i64 -1> +// CHECK: and <2 x i64> %{{[0-9]+}}, +// CHECK: and <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} +// CHECK: or <2 x i64> +// CHECK-LE: xor <2 x i64> %{{[0-9]+}}, <i64 -1, i64 -1> +// CHECK-LE: and <2 x i64> %{{[0-9]+}}, +// CHECK-LE: and <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} +// CHECK-LE: or <2 x i64> + + res_vsll = vec_sel(vsll, vsll, vbll); +// CHECK: xor <2 x i64> %{{[0-9]+}}, <i64 -1, i64 -1> +// CHECK: and <2 x i64> %{{[0-9]+}}, +// CHECK: and <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} +// CHECK: or <2 x i64> +// CHECK-LE: xor <2 x i64> %{{[0-9]+}}, <i64 -1, i64 -1> +// CHECK-LE: and <2 x i64> %{{[0-9]+}}, +// CHECK-LE: and <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} +// CHECK-LE: or <2 x i64> + + res_vsll = vec_sel(vsll, vsll, vull); +// CHECK: xor <2 x i64> %{{[0-9]+}}, <i64 -1, i64 -1> +// CHECK: and <2 x i64> %{{[0-9]+}}, +// CHECK: and <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} +// CHECK: or <2 x i64> +// CHECK-LE: xor <2 x i64> %{{[0-9]+}}, <i64 -1, i64 -1> +// CHECK-LE: and <2 x i64> %{{[0-9]+}}, +// CHECK-LE: and <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} +// CHECK-LE: or <2 x i64> + + res_vull = vec_sel(vull, vull, vbll); +// CHECK: xor <2 x i64> %{{[0-9]+}}, <i64 -1, i64 -1> +// CHECK: and <2 x i64> %{{[0-9]+}}, +// CHECK: and <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} +// CHECK: or <2 x i64> +// CHECK-LE: xor <2 x i64> %{{[0-9]+}}, <i64 -1, i64 -1> +// CHECK-LE: and <2 x i64> %{{[0-9]+}}, +// CHECK-LE: and <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} +// CHECK-LE: or <2 x i64> + + res_vull = vec_sel(vull, vull, vull); +// CHECK: xor <2 x i64> %{{[0-9]+}}, <i64 -1, i64 -1> +// CHECK: and <2 x i64> %{{[0-9]+}}, +// CHECK: and <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} +// CHECK: or <2 x i64> +// CHECK-LE: xor <2 x i64> %{{[0-9]+}}, <i64 -1, i64 -1> +// CHECK-LE: and <2 x i64> %{{[0-9]+}}, +// CHECK-LE: and <2 x i64> %{{[0-9]+}}, %{{[0-9]+}} +// CHECK-LE: or <2 x i64> + res_vf = vec_sqrt(vf); // CHECK: call <4 x float> @llvm.sqrt.v4f32(<4 x float> %{{[0-9]+}}) // CHECK-LE: call <4 x float> @llvm.sqrt.v4f32(<4 x float> %{{[0-9]+}}) _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits