kristof.beyls added a comment. In D93221#2459903 <https://reviews.llvm.org/D93221#2459903>, @ostannard wrote:
> Why is this restricted to v7-A or later? The DSB and ISB instructions have > existed since v6T2 and v6M. This mitigation is never needed for M-class cores nor for v6T2. By restricting it to v7-A it's simpler to explain in the diagnostic for which targets this is supported. I thought that overall this was a better trade-off. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D93221/new/ https://reviews.llvm.org/D93221 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
