This revision was automatically updated to reflect the committed changes.
Closed by commit rG0cbf61be8be5: [mac/arm] Fix rtti codegen tests when running
on an arm mac (authored by thakis).
Herald added a project: clang.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D91904/new/
https://reviews.llvm.org/D91904
Files:
clang/include/clang/Basic/TargetCXXABI.h
clang/lib/AST/ASTContext.cpp
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/CodeGen/CodeGenModule.cpp
clang/lib/CodeGen/ItaniumCXXABI.cpp
clang/test/CodeGenCXX/weak-extern-typeinfo.cpp
clang/test/SemaCXX/typeid-ref.cpp
Index: clang/test/SemaCXX/typeid-ref.cpp
===================================================================
--- clang/test/SemaCXX/typeid-ref.cpp
+++ clang/test/SemaCXX/typeid-ref.cpp
@@ -6,7 +6,7 @@
struct X { };
void f() {
- // CHECK: @_ZTS1X = linkonce_odr {{(dso_local )?}}constant
- // CHECK: @_ZTI1X = linkonce_odr {{(dso_local )?}}constant
+ // CHECK: @_ZTS1X = linkonce_odr {{(dso_local|hidden )?}}constant
+ // CHECK: @_ZTI1X = linkonce_odr {{(dso_local|hidden )?}}constant
(void)typeid(X&);
}
Index: clang/test/CodeGenCXX/weak-extern-typeinfo.cpp
===================================================================
--- clang/test/CodeGenCXX/weak-extern-typeinfo.cpp
+++ clang/test/CodeGenCXX/weak-extern-typeinfo.cpp
@@ -31,17 +31,17 @@
void V1::foo() { }
void V2::foo() { }
-// CHECK: @_ZTS1A = weak_odr {{(dso_local )?}}constant
-// CHECK: @_ZTI1A = weak_odr {{(dso_local )?}}constant
-// CHECK: @_ZTS1B = weak_odr {{(dso_local )?}}constant
-// CHECK: @_ZTI1B = weak_odr {{(dso_local )?}}constant
-// CHECK: @_ZTS1C = weak_odr {{(dso_local )?}}constant
-// CHECK: @_ZTS2T1 = linkonce_odr {{(dso_local )?}}constant
-// CHECK: @_ZTI2T1 = linkonce_odr {{(dso_local )?}}constant
-// CHECK: @_ZTS1T = linkonce_odr {{(dso_local )?}}constant
-// CHECK: @_ZTI1T = linkonce_odr {{(dso_local )?}}constant
-// CHECK: @_ZTI1C = weak_odr {{(dso_local )?}}constant
-// CHECK: @_ZTS2V1 = weak_odr {{(dso_local )?}}constant
-// CHECK: @_ZTI2V1 = weak_odr {{(dso_local )?}}constant
-// CHECK: @_ZTS2V2 = weak_odr {{(dso_local )?}}constant
-// CHECK: @_ZTI2V2 = weak_odr {{(dso_local )?}}constant
+// CHECK: @_ZTS1A = weak_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTI1A = weak_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTS1B = weak_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTI1B = weak_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTS1C = weak_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTS2T1 = linkonce_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTI2T1 = linkonce_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTS1T = linkonce_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTI1T = linkonce_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTI1C = weak_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTS2V1 = weak_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTI2V1 = weak_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTS2V2 = weak_odr {{(dso_local|hidden )?}}constant
+// CHECK: @_ZTI2V2 = weak_odr {{(dso_local|hidden )?}}constant
Index: clang/lib/CodeGen/ItaniumCXXABI.cpp
===================================================================
--- clang/lib/CodeGen/ItaniumCXXABI.cpp
+++ clang/lib/CodeGen/ItaniumCXXABI.cpp
@@ -486,9 +486,9 @@
CharUnits cookieSize) override;
};
-class iOS64CXXABI : public ARMCXXABI {
+class AppleARM64CXXABI : public ARMCXXABI {
public:
- iOS64CXXABI(CodeGen::CodeGenModule &CGM) : ARMCXXABI(CGM) {
+ AppleARM64CXXABI(CodeGen::CodeGenModule &CGM) : ARMCXXABI(CGM) {
Use32BitVTableOffsetABI = true;
}
@@ -551,8 +551,8 @@
case TargetCXXABI::WatchOS:
return new ARMCXXABI(CGM);
- case TargetCXXABI::iOS64:
- return new iOS64CXXABI(CGM);
+ case TargetCXXABI::AppleARM64:
+ return new AppleARM64CXXABI(CGM);
case TargetCXXABI::Fuchsia:
return new FuchsiaCXXABI(CGM);
Index: clang/lib/CodeGen/CodeGenModule.cpp
===================================================================
--- clang/lib/CodeGen/CodeGenModule.cpp
+++ clang/lib/CodeGen/CodeGenModule.cpp
@@ -76,11 +76,11 @@
static CGCXXABI *createCXXABI(CodeGenModule &CGM) {
switch (CGM.getTarget().getCXXABI().getKind()) {
+ case TargetCXXABI::AppleARM64:
case TargetCXXABI::Fuchsia:
case TargetCXXABI::GenericAArch64:
case TargetCXXABI::GenericARM:
case TargetCXXABI::iOS:
- case TargetCXXABI::iOS64:
case TargetCXXABI::WatchOS:
case TargetCXXABI::GenericMIPS:
case TargetCXXABI::GenericItanium:
Index: clang/lib/Basic/Targets/AArch64.cpp
===================================================================
--- clang/lib/Basic/Targets/AArch64.cpp
+++ clang/lib/Basic/Targets/AArch64.cpp
@@ -857,7 +857,7 @@
UseZeroLengthBitfieldAlignment = true;
TheCXXABI.set(TargetCXXABI::WatchOS);
} else
- TheCXXABI.set(TargetCXXABI::iOS64);
+ TheCXXABI.set(TargetCXXABI::AppleARM64);
}
void DarwinAArch64TargetInfo::getOSDefines(const LangOptions &Opts,
Index: clang/lib/AST/ASTContext.cpp
===================================================================
--- clang/lib/AST/ASTContext.cpp
+++ clang/lib/AST/ASTContext.cpp
@@ -883,10 +883,10 @@
if (!LangOpts.CPlusPlus) return nullptr;
switch (T.getCXXABI().getKind()) {
+ case TargetCXXABI::AppleARM64:
case TargetCXXABI::Fuchsia:
case TargetCXXABI::GenericARM: // Same as Itanium at this level
case TargetCXXABI::iOS:
- case TargetCXXABI::iOS64:
case TargetCXXABI::WatchOS:
case TargetCXXABI::GenericAArch64:
case TargetCXXABI::GenericMIPS:
@@ -10871,13 +10871,13 @@
if (!T)
T = Target;
switch (T->getCXXABI().getKind()) {
+ case TargetCXXABI::AppleARM64:
case TargetCXXABI::Fuchsia:
case TargetCXXABI::GenericAArch64:
case TargetCXXABI::GenericItanium:
case TargetCXXABI::GenericARM:
case TargetCXXABI::GenericMIPS:
case TargetCXXABI::iOS:
- case TargetCXXABI::iOS64:
case TargetCXXABI::WebAssembly:
case TargetCXXABI::WatchOS:
case TargetCXXABI::XL:
Index: clang/include/clang/Basic/TargetCXXABI.h
===================================================================
--- clang/include/clang/Basic/TargetCXXABI.h
+++ clang/include/clang/Basic/TargetCXXABI.h
@@ -62,17 +62,17 @@
/// - constructor/destructor signatures.
iOS,
- /// The iOS 64-bit ABI is follows ARM's published 64-bit ABI more
- /// closely, but we don't guarantee to follow it perfectly.
+ /// The iOS 64-bit and macOS 64-bit ARM ABI follows ARM's published 64-bit
+ /// ABI more closely, but we don't guarantee to follow it perfectly.
///
/// It is documented here:
/// http://infocenter.arm.com
/// /help/topic/com.arm.doc.ihi0059a/IHI0059A_cppabi64.pdf
- iOS64,
+ AppleARM64,
/// WatchOS is a modernisation of the iOS ABI, which roughly means it's
- /// the iOS64 ABI ported to 32-bits. The primary difference from iOS64 is
- /// that RTTI objects must still be unique at the moment.
+ /// the AppleARM64 ABI ported to 32-bits. The primary difference from
+ /// AppleARM64 is that RTTI objects must still be unique at the moment.
WatchOS,
/// The generic AArch64 ABI is also a modified version of the Itanium ABI,
@@ -98,7 +98,7 @@
/// - guard variables are 32-bit on wasm32, as in ARM;
/// - unused bits of guard variables are reserved, as in ARM;
/// - inline functions are never key functions, as in ARM;
- /// - C++11 POD rules are used for tail padding, as in iOS64.
+ /// - C++11 POD rules are used for tail padding, as in AppleARM64.
///
/// TODO: At present the WebAssembly ABI is not considered stable, so none
/// of these details is necessarily final yet.
@@ -147,12 +147,12 @@
/// Does this ABI generally fall into the Itanium family of ABIs?
bool isItaniumFamily() const {
switch (getKind()) {
+ case AppleARM64:
case Fuchsia:
case GenericAArch64:
case GenericItanium:
case GenericARM:
case iOS:
- case iOS64:
case WatchOS:
case GenericMIPS:
case WebAssembly:
@@ -168,12 +168,12 @@
/// Is this ABI an MSVC-compatible ABI?
bool isMicrosoft() const {
switch (getKind()) {
+ case AppleARM64:
case Fuchsia:
case GenericAArch64:
case GenericItanium:
case GenericARM:
case iOS:
- case iOS64:
case WatchOS:
case GenericMIPS:
case WebAssembly:
@@ -200,6 +200,7 @@
case WebAssembly:
// WebAssembly doesn't require any special alignment for member functions.
return false;
+ case AppleARM64:
case Fuchsia:
case GenericARM:
case GenericAArch64:
@@ -209,7 +210,6 @@
// special alignment and could therefore also return false.
case GenericItanium:
case iOS:
- case iOS64:
case WatchOS:
case Microsoft:
case XL:
@@ -277,9 +277,9 @@
/// done on a generic Itanium platform.
bool canKeyFunctionBeInline() const {
switch (getKind()) {
+ case AppleARM64:
case Fuchsia:
case GenericARM:
- case iOS64:
case WebAssembly:
case WatchOS:
return false;
@@ -330,10 +330,10 @@
case XL:
return UseTailPaddingUnlessPOD03;
- // iOS on ARM64 and WebAssembly use the C++11 POD rules. They do not honor
+ // AppleARM64 and WebAssembly use the C++11 POD rules. They do not honor
// the Itanium exception about classes with over-large bitfields.
+ case AppleARM64:
case Fuchsia:
- case iOS64:
case WebAssembly:
case WatchOS:
return UseTailPaddingUnlessPOD11;
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