ZarkoCA updated this revision to Diff 307748.
ZarkoCA added a comment.

Added regex and variable for function attribute


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D92117/new/

https://reviews.llvm.org/D92117

Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/test/CodeGen/aix-altivec.c
  clang/test/CodeGen/aix-vector.c

Index: clang/test/CodeGen/aix-vector.c
===================================================================
--- clang/test/CodeGen/aix-vector.c
+++ /dev/null
@@ -1,10 +0,0 @@
-// REQUIRES: powerpc-registered-target
-// RUN: not %clang_cc1 -triple powerpc-unknown-aix  -target-feature +altivec \
-// RUN:   -emit-llvm -o - %s 2>&1 | FileCheck %s
-// RUN: not %clang_cc1 -triple powerpc64-unknown-aix  -target-feature +altivec \
-// RUN:   -emit-llvm -o - %s 2>&1 | FileCheck %s
-
-// CHECK: fatal error: error in backend: vector type is not supported on AIX yet
-vector signed int retVector(vector signed int x) {
-  return x;
-}
Index: clang/test/CodeGen/aix-altivec.c
===================================================================
--- /dev/null
+++ clang/test/CodeGen/aix-altivec.c
@@ -0,0 +1,44 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -target-feature +altivec -target-cpu pwr8 -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-unknown-aix -target-feature +altivec -target-cpu pwr8 -emit-llvm %s -o - | FileCheck %s
+vector float foo1(vector float x) { return x; }
+// CHECK:  define <4 x float> @foo1(<4 x float> %x) [[ATTR:#[0-9]+]] {
+// CHECK:  entry:
+// CHECK:    %x.addr = alloca <4 x float>, align 16
+// CHECK:    store <4 x float> %x, <4 x float>* %x.addr, align 16
+// CHECK:    %0 = load <4 x float>, <4 x float>* %x.addr, align 16
+// CHECK:    ret <4 x float> %0
+// CHECK:  }
+vector double foo2(vector double x) { return x; }
+// CHECK:  define <2 x double> @foo2(<2 x double> %x) [[ATTR]] {
+// CHECK:  entry:
+// CHECK:    %x.addr = alloca <2 x double>, align 16
+// CHECK:    store <2 x double> %x, <2 x double>* %x.addr, align 16
+// CHECK:    %0 = load <2 x double>, <2 x double>* %x.addr, align 16
+// CHECK:    ret <2 x double> %0
+// CHECK:  }
+vector int foo3(vector int x) { return x; }
+// CHECK:  define <4 x i32> @foo3(<4 x i32> %x) [[ATTR]] {
+// CHECK:  entry:
+// CHECK:    %x.addr = alloca <4 x i32>, align 16
+// CHECK:    store <4 x i32> %x, <4 x i32>* %x.addr, align 16
+// CHECK:    %0 = load <4 x i32>, <4 x i32>* %x.addr, align 16
+// CHECK:    ret <4 x i32> %0
+// CHECK:  }
+vector short int foo4(vector short int x) { return x; }
+// CHECK:  define <8 x i16> @foo4(<8 x i16> %x) [[ATTR]] {
+// CHECK:  entry:
+// CHECK:    %x.addr = alloca <8 x i16>, align 16
+// CHECK:    store <8 x i16> %x, <8 x i16>* %x.addr, align 16
+// CHECK:    %0 = load <8 x i16>, <8 x i16>* %x.addr, align 16
+// CHECK:    ret <8 x i16> %0
+// CHECK:  }
+vector char foo5(vector char x) { return x; }
+// CHECK:  define <16 x i8> @foo5(<16 x i8> %x) [[ATTR]] {
+// CHECK:  entry:
+// CHECK:    %x.addr = alloca <16 x i8>, align 16
+// CHECK:    store <16 x i8> %x, <16 x i8>* %x.addr, align 16
+// CHECK:    %0 = load <16 x i8>, <16 x i8>* %x.addr, align 16
+// CHECK:    ret <16 x i8> %0
+// CHECK:  }
+
Index: clang/lib/CodeGen/TargetInfo.cpp
===================================================================
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -4514,7 +4514,7 @@
     return ABIArgInfo::getDirect();
 
   if (RetTy->isVectorType())
-    llvm::report_fatal_error("vector type is not supported on AIX yet");
+    return ABIArgInfo::getDirect();
 
   if (RetTy->isVoidType())
     return ABIArgInfo::getIgnore();
@@ -4533,7 +4533,7 @@
     return ABIArgInfo::getDirect();
 
   if (Ty->isVectorType())
-    llvm::report_fatal_error("vector type is not supported on AIX yet");
+    return ABIArgInfo::getDirect();
 
   if (isAggregateTypeForABI(Ty)) {
     // Records with non-trivial destructors/copy-constructors should not be
@@ -4558,7 +4558,7 @@
     Ty = CTy->getElementType();
 
   if (Ty->isVectorType())
-    llvm::report_fatal_error("vector type is not supported on AIX yet");
+    return CharUnits::fromQuantity(16);
 
   // If the structure contains a vector type, the alignment is 16.
   if (isRecordWithSIMDVectorType(getContext(), Ty))
@@ -4573,7 +4573,8 @@
     llvm::report_fatal_error("complex type is not supported on AIX yet");
 
   if (Ty->isVectorType())
-    llvm::report_fatal_error("vector type is not supported on AIX yet");
+    llvm::report_fatal_error(
+        "vector types are not yet supported for variadic functions on AIX");
 
   auto TypeInfo = getContext().getTypeInfoInChars(Ty);
   TypeInfo.Align = getParamTypeAlignment(Ty);
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  • [PATCH] D92117: [AIX] Ena... Xiangling Liao via Phabricator via cfe-commits
    • [PATCH] D92117: [AIX... Zarko Todorovski via Phabricator via cfe-commits

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