nemanjai added inline comments.
================ Comment at: clang/test/CodeGen/builtins-ppc-vsx.c:1 -// REQUIRES: powerpc-registered-target +// requires: powerpc-registered-target // RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s ---------------- bsaleil wrote: > Unrelated change ? I am not sure if this even works or not, but no other tests have it in lowercase and neither should this one. In addition of course to it being an unrelated change. ================ Comment at: clang/test/CodeGen/builtins-ppc-vsx.c:1838 +// CHECK-LABEL: test_vector_cpsgn_float +// CHECK: %6 = call <4 x float> @llvm.copysign.v4f32(<4 x float> %4, <4 x float> %5) + vec_cpsgn(a, b); ---------------- The test case should not hard-code the virtual register names such as `%4, %5, %6`. Those should be set in the signature of the function and checked in the call instruction. I believe that vreg naming is different on non-assert builds which would make this fail right away on bots that build without asserts/debug. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D84962/new/ https://reviews.llvm.org/D84962 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
