blackliner added a comment. I am getting errors with clang-tidy, is this the right place to ask for those additional constraints?
CUDA allows a few more output constraints --> https://docs.nvidia.com/cuda/inline-ptx-assembly/index.html#constraints 1.1.2. Constraints There is a separate constraint letter for each PTX register type: "h" = .u16 reg "r" = .u32 reg "l" = .u64 reg "f" = .f32 reg "d" = .f64 reg Repository: rL LLVM CHANGES SINCE LAST ACTION https://reviews.llvm.org/D31383/new/ https://reviews.llvm.org/D31383 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
