lei accepted this revision.
lei added a comment.
This revision is now accepted and ready to land.
Just some minor comments. Please address them prior to commit.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:10519
+ // 2 or 4 vsx registers.
+ if (VT == MVT::v256i1 || VT == MVT::v512i1) {
+ assert((VT != MVT::v512i1 || Subtarget.hasMMA()) &&
----------------
Maybe we can do an early exit instead of this if stmt here
```
if (VT != MVT::v256i1 && VT != MVT::v512i1)
return Op;
assert(Subtarget.pairedVectorMemops()) &&
"Type unsupported without paired vector support");
```
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:10522
+ "Type unsupported without MMA");
+ assert((VT != MVT::v256i1 || Subtarget.pairedVectorMemops()) &&
+ "Type unsupported without paired vector support");
----------------
I believe the ck for v256i1 here is redundant cause MMA should also set
pairedVectorMemops ....
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:10566
+ // underlying registers individually.
+ if (StoreVT == MVT::v256i1 || StoreVT == MVT::v512i1) {
+ assert((StoreVT != MVT::v512i1 || Subtarget.hasMMA()) &&
----------------
same comment as above... early exit.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D84968/new/
https://reviews.llvm.org/D84968
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