DavidSpickett created this revision. Herald added subscribers: cfe-commits, danielkiss, kristof.beyls. Herald added a project: clang. DavidSpickett requested review of this revision.
Neon intrinsics vqmovunh_s16, vqmovuns_s32, vqmovund_s64 should have unsigned return types. See https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics?search=vqmovun Fixes https://bugs.llvm.org/show_bug.cgi?id=46840 Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D85118 Files: clang/include/clang/Basic/arm_neon.td clang/test/CodeGen/aarch64-neon-intrinsics.c Index: clang/test/CodeGen/aarch64-neon-intrinsics.c =================================================================== --- clang/test/CodeGen/aarch64-neon-intrinsics.c +++ clang/test/CodeGen/aarch64-neon-intrinsics.c @@ -14094,8 +14094,8 @@ // CHECK: [[VQMOVUNH_S16_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqxtun.v8i8(<8 x i16> [[TMP0]]) // CHECK: [[TMP1:%.*]] = extractelement <8 x i8> [[VQMOVUNH_S16_I]], i64 0 // CHECK: ret i8 [[TMP1]] -int8_t test_vqmovunh_s16(int16_t a) { - return (int8_t)vqmovunh_s16(a); +uint8_t test_vqmovunh_s16(int16_t a) { + return (uint8_t)vqmovunh_s16(a); } // CHECK-LABEL: @test_vqmovuns_s32( @@ -14103,15 +14103,15 @@ // CHECK: [[VQMOVUNS_S32_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqxtun.v4i16(<4 x i32> [[TMP0]]) // CHECK: [[TMP1:%.*]] = extractelement <4 x i16> [[VQMOVUNS_S32_I]], i64 0 // CHECK: ret i16 [[TMP1]] -int16_t test_vqmovuns_s32(int32_t a) { - return (int16_t)vqmovuns_s32(a); +uint16_t test_vqmovuns_s32(int32_t a) { + return (uint16_t)vqmovuns_s32(a); } // CHECK-LABEL: @test_vqmovund_s64( // CHECK: [[VQMOVUND_S64_I:%.*]] = call i32 @llvm.aarch64.neon.scalar.sqxtun.i32.i64(i64 %a) // CHECK: ret i32 [[VQMOVUND_S64_I]] -int32_t test_vqmovund_s64(int64_t a) { - return (int32_t)vqmovund_s64(a); +uint32_t test_vqmovund_s64(int64_t a) { + return (uint32_t)vqmovund_s64(a); } // CHECK-LABEL: @test_vqmovnh_s16( Index: clang/include/clang/Basic/arm_neon.td =================================================================== --- clang/include/clang/Basic/arm_neon.td +++ clang/include/clang/Basic/arm_neon.td @@ -1498,7 +1498,7 @@ //////////////////////////////////////////////////////////////////////////////// // Scalar Signed Saturating Extract Unsigned Narrow -def SCALAR_SQXTUN : SInst<"vqmovun", "(1<)1", "SsSiSl">; +def SCALAR_SQXTUN : SInst<"vqmovun", "(U1<)1", "SsSiSl">; //////////////////////////////////////////////////////////////////////////////// // Scalar Signed Saturating Extract Narrow
Index: clang/test/CodeGen/aarch64-neon-intrinsics.c =================================================================== --- clang/test/CodeGen/aarch64-neon-intrinsics.c +++ clang/test/CodeGen/aarch64-neon-intrinsics.c @@ -14094,8 +14094,8 @@ // CHECK: [[VQMOVUNH_S16_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqxtun.v8i8(<8 x i16> [[TMP0]]) // CHECK: [[TMP1:%.*]] = extractelement <8 x i8> [[VQMOVUNH_S16_I]], i64 0 // CHECK: ret i8 [[TMP1]] -int8_t test_vqmovunh_s16(int16_t a) { - return (int8_t)vqmovunh_s16(a); +uint8_t test_vqmovunh_s16(int16_t a) { + return (uint8_t)vqmovunh_s16(a); } // CHECK-LABEL: @test_vqmovuns_s32( @@ -14103,15 +14103,15 @@ // CHECK: [[VQMOVUNS_S32_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqxtun.v4i16(<4 x i32> [[TMP0]]) // CHECK: [[TMP1:%.*]] = extractelement <4 x i16> [[VQMOVUNS_S32_I]], i64 0 // CHECK: ret i16 [[TMP1]] -int16_t test_vqmovuns_s32(int32_t a) { - return (int16_t)vqmovuns_s32(a); +uint16_t test_vqmovuns_s32(int32_t a) { + return (uint16_t)vqmovuns_s32(a); } // CHECK-LABEL: @test_vqmovund_s64( // CHECK: [[VQMOVUND_S64_I:%.*]] = call i32 @llvm.aarch64.neon.scalar.sqxtun.i32.i64(i64 %a) // CHECK: ret i32 [[VQMOVUND_S64_I]] -int32_t test_vqmovund_s64(int64_t a) { - return (int32_t)vqmovund_s64(a); +uint32_t test_vqmovund_s64(int64_t a) { + return (uint32_t)vqmovund_s64(a); } // CHECK-LABEL: @test_vqmovnh_s16( Index: clang/include/clang/Basic/arm_neon.td =================================================================== --- clang/include/clang/Basic/arm_neon.td +++ clang/include/clang/Basic/arm_neon.td @@ -1498,7 +1498,7 @@ //////////////////////////////////////////////////////////////////////////////// // Scalar Signed Saturating Extract Unsigned Narrow -def SCALAR_SQXTUN : SInst<"vqmovun", "(1<)1", "SsSiSl">; +def SCALAR_SQXTUN : SInst<"vqmovun", "(U1<)1", "SsSiSl">; //////////////////////////////////////////////////////////////////////////////// // Scalar Signed Saturating Extract Narrow
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