Author: Sander de Smalen Date: 2020-06-10T08:29:34+01:00 New Revision: a8fbbf8fe251652847bd98a5800a27375e13b1f9
URL: https://github.com/llvm/llvm-project/commit/a8fbbf8fe251652847bd98a5800a27375e13b1f9 DIFF: https://github.com/llvm/llvm-project/commit/a8fbbf8fe251652847bd98a5800a27375e13b1f9.diff LOG: [SveEmitter] NFC: Add missing ACLE tests These ACLE tests were missing in previous patches: - D79357: [SveEmitter] Add builtins for svdup and svindex - D78747: [SveEmitter] Add builtins for compares and ReverseCompare flag. - D76238: [SveEmitter] Implement builtins for contiguous loads/stores Added: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_index.c clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sb.c Modified: Removed: ################################################################################ diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c new file mode 100644 index 000000000000..c5c307122545 --- /dev/null +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c @@ -0,0 +1,63 @@ +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s + +#include <arm_sve.h> + +#ifdef SVE_OVERLOADED_FORMS +// A simple used,unused... macro, long enough to represent any SVE builtin. +#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3 +#else +#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 +#endif + +svbool_t test_svacge_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) +{ + // CHECK-LABEL: test_svacge_f16 + // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.facge.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2) + // CHECK: %[[CAST:.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> %[[INTRINSIC]]) + // CHECK: ret <vscale x 16 x i1> %[[CAST]] + return SVE_ACLE_FUNC(svacge,_f16,,)(pg, op1, op2); +} + +svbool_t test_svacge_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) +{ + // CHECK-LABEL: test_svacge_f32 + // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.facge.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2) + // CHECK: %[[CAST:.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> %[[INTRINSIC]]) + // CHECK: ret <vscale x 16 x i1> %[[CAST]] + return SVE_ACLE_FUNC(svacge,_f32,,)(pg, op1, op2); +} + +svbool_t test_svacge_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) +{ + // CHECK-LABEL: test_svacge_f64 + // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.facge.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2) + // CHECK: %[[CAST:.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> %[[INTRINSIC]]) + // CHECK: ret <vscale x 16 x i1> %[[CAST]] + return SVE_ACLE_FUNC(svacge,_f64,,)(pg, op1, op2); +} + +svbool_t test_svacge_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) +{ + // CHECK-LABEL: test_svacge_n_f32 + // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) + // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.facge.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]]) + // CHECK: %[[CAST:.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> %[[INTRINSIC]]) + // CHECK: ret <vscale x 16 x i1> %[[CAST]] + return SVE_ACLE_FUNC(svacge,_n_f32,,)(pg, op1, op2); +} + +svbool_t test_svacge_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) +{ + // CHECK-LABEL: test_svacge_n_f64 + // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) + // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.facge.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]]) + // CHECK: %[[CAST:.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> %[[INTRINSIC]]) + // CHECK: ret <vscale x 16 x i1> %[[CAST]] + return SVE_ACLE_FUNC(svacge,_n_f64,,)(pg, op1, op2); +} diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c new file mode 100644 index 000000000000..00e408ca4d94 --- /dev/null +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c @@ -0,0 +1,63 @@ +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s + +#include <arm_sve.h> + +#ifdef SVE_OVERLOADED_FORMS +// A simple used,unused... macro, long enough to represent any SVE builtin. +#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3 +#else +#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 +#endif + +svbool_t test_svacgt_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) +{ + // CHECK-LABEL: test_svacgt_f16 + // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.facgt.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2) + // CHECK: %[[CAST:.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> %[[INTRINSIC]]) + // CHECK: ret <vscale x 16 x i1> %[[CAST]] + return SVE_ACLE_FUNC(svacgt,_f16,,)(pg, op1, op2); +} + +svbool_t test_svacgt_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) +{ + // CHECK-LABEL: test_svacgt_f32 + // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.facgt.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2) + // CHECK: %[[CAST:.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> %[[INTRINSIC]]) + // CHECK: ret <vscale x 16 x i1> %[[CAST]] + return SVE_ACLE_FUNC(svacgt,_f32,,)(pg, op1, op2); +} + +svbool_t test_svacgt_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) +{ + // CHECK-LABEL: test_svacgt_f64 + // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.facgt.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2) + // CHECK: %[[CAST:.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> %[[INTRINSIC]]) + // CHECK: ret <vscale x 16 x i1> %[[CAST]] + return SVE_ACLE_FUNC(svacgt,_f64,,)(pg, op1, op2); +} + +svbool_t test_svacgt_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) +{ + // CHECK-LABEL: test_svacgt_n_f32 + // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) + // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.facgt.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]]) + // CHECK: %[[CAST:.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> %[[INTRINSIC]]) + // CHECK: ret <vscale x 16 x i1> %[[CAST]] + return SVE_ACLE_FUNC(svacgt,_n_f32,,)(pg, op1, op2); +} + +svbool_t test_svacgt_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) +{ + // CHECK-LABEL: test_svacgt_n_f64 + // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) + // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.facgt.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]]) + // CHECK: %[[CAST:.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> %[[INTRINSIC]]) + // CHECK: ret <vscale x 16 x i1> %[[CAST]] + return SVE_ACLE_FUNC(svacgt,_n_f64,,)(pg, op1, op2); +} diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c new file mode 100644 index 000000000000..6ba53d0bb8c3 --- /dev/null +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c @@ -0,0 +1,63 @@ +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s + +#include <arm_sve.h> + +#ifdef SVE_OVERLOADED_FORMS +// A simple used,unused... macro, long enough to represent any SVE builtin. +#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3 +#else +#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 +#endif + +svbool_t test_svacle_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) +{ + // CHECK-LABEL: test_svacle_f16 + // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.facge.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op2, <vscale x 8 x half> %op1) + // CHECK: %[[CAST:.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> %[[INTRINSIC]]) + // CHECK: ret <vscale x 16 x i1> %[[CAST]] + return SVE_ACLE_FUNC(svacle,_f16,,)(pg, op1, op2); +} + +svbool_t test_svacle_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) +{ + // CHECK-LABEL: test_svacle_f32 + // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.facge.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op2, <vscale x 4 x float> %op1) + // CHECK: %[[CAST:.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> %[[INTRINSIC]]) + // CHECK: ret <vscale x 16 x i1> %[[CAST]] + return SVE_ACLE_FUNC(svacle,_f32,,)(pg, op1, op2); +} + +svbool_t test_svacle_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) +{ + // CHECK-LABEL: test_svacle_f64 + // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.facge.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op2, <vscale x 2 x double> %op1) + // CHECK: %[[CAST:.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> %[[INTRINSIC]]) + // CHECK: ret <vscale x 16 x i1> %[[CAST]] + return SVE_ACLE_FUNC(svacle,_f64,,)(pg, op1, op2); +} + +svbool_t test_svacle_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) +{ + // CHECK-LABEL: test_svacle_n_f32 + // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) + // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.facge.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[DUP]], <vscale x 4 x float> %op1) + // CHECK: %[[CAST:.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> %[[INTRINSIC]]) + // CHECK: ret <vscale x 16 x i1> %[[CAST]] + return SVE_ACLE_FUNC(svacle,_n_f32,,)(pg, op1, op2); +} + +svbool_t test_svacle_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) +{ + // CHECK-LABEL: test_svacle_n_f64 + // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) + // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.facge.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[DUP]], <vscale x 2 x double> %op1) + // CHECK: %[[CAST:.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> %[[INTRINSIC]]) + // CHECK: ret <vscale x 16 x i1> %[[CAST]] + return SVE_ACLE_FUNC(svacle,_n_f64,,)(pg, op1, op2); +} diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c new file mode 100644 index 000000000000..781e6633f69f --- /dev/null +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c @@ -0,0 +1,63 @@ +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s + +#include <arm_sve.h> + +#ifdef SVE_OVERLOADED_FORMS +// A simple used,unused... macro, long enough to represent any SVE builtin. +#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3 +#else +#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 +#endif + +svbool_t test_svaclt_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) +{ + // CHECK-LABEL: test_svaclt_f16 + // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.facgt.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op2, <vscale x 8 x half> %op1) + // CHECK: %[[CAST:.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> %[[INTRINSIC]]) + // CHECK: ret <vscale x 16 x i1> %[[CAST]] + return SVE_ACLE_FUNC(svaclt,_f16,,)(pg, op1, op2); +} + +svbool_t test_svaclt_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) +{ + // CHECK-LABEL: test_svaclt_f32 + // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.facgt.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op2, <vscale x 4 x float> %op1) + // CHECK: %[[CAST:.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> %[[INTRINSIC]]) + // CHECK: ret <vscale x 16 x i1> %[[CAST]] + return SVE_ACLE_FUNC(svaclt,_f32,,)(pg, op1, op2); +} + +svbool_t test_svaclt_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) +{ + // CHECK-LABEL: test_svaclt_f64 + // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.facgt.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op2, <vscale x 2 x double> %op1) + // CHECK: %[[CAST:.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> %[[INTRINSIC]]) + // CHECK: ret <vscale x 16 x i1> %[[CAST]] + return SVE_ACLE_FUNC(svaclt,_f64,,)(pg, op1, op2); +} + +svbool_t test_svaclt_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) +{ + // CHECK-LABEL: test_svaclt_n_f32 + // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) + // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.facgt.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[DUP]], <vscale x 4 x float> %op1) + // CHECK: %[[CAST:.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> %[[INTRINSIC]]) + // CHECK: ret <vscale x 16 x i1> %[[CAST]] + return SVE_ACLE_FUNC(svaclt,_n_f32,,)(pg, op1, op2); +} + +svbool_t test_svaclt_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) +{ + // CHECK-LABEL: test_svaclt_n_f64 + // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) + // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.facgt.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[DUP]], <vscale x 2 x double> %op1) + // CHECK: %[[CAST:.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> %[[INTRINSIC]]) + // CHECK: ret <vscale x 16 x i1> %[[CAST]] + return SVE_ACLE_FUNC(svaclt,_n_f64,,)(pg, op1, op2); +} diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_index.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_index.c new file mode 100644 index 000000000000..d7241d1c014d --- /dev/null +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_index.c @@ -0,0 +1,67 @@ +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s + +#include <arm_sve.h> + +svint8_t test_svindex_s8(int8_t base, int8_t step) +{ + // CHECK-LABEL: test_svindex_s8 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.index.nxv16i8(i8 %base, i8 %step) + // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]] + return svindex_s8(base, step); +} + +svint16_t test_svindex_s16(int16_t base, int16_t step) +{ + // CHECK-LABEL: test_svindex_s16 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.index.nxv8i16(i16 %base, i16 %step) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + return svindex_s16(base, step); +} + +svint32_t test_svindex_s32(int32_t base, int32_t step) +{ + // CHECK-LABEL: test_svindex_s32 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.index.nxv4i32(i32 %base, i32 %step) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + return svindex_s32(base, step); +} + +svint64_t test_svindex_s64(int64_t base, int64_t step) +{ + // CHECK-LABEL: test_svindex_s64 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.index.nxv2i64(i64 %base, i64 %step) + // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]] + return svindex_s64(base, step); +} + +svuint8_t test_svindex_u8(uint8_t base, uint8_t step) +{ + // CHECK-LABEL: test_svindex_u8 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.index.nxv16i8(i8 %base, i8 %step) + // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]] + return svindex_u8(base, step); +} + +svuint16_t test_svindex_u16(uint16_t base, uint16_t step) +{ + // CHECK-LABEL: test_svindex_u16 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.index.nxv8i16(i16 %base, i16 %step) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + return svindex_u16(base, step); +} + +svuint32_t test_svindex_u32(uint32_t base, uint32_t step) +{ + // CHECK-LABEL: test_svindex_u32 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.index.nxv4i32(i32 %base, i32 %step) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + return svindex_u32(base, step); +} + +svuint64_t test_svindex_u64(uint64_t base, uint64_t step) +{ + // CHECK-LABEL: test_svindex_u64 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.index.nxv2i64(i64 %base, i64 %step) + // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]] + return svindex_u64(base, step); +} diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sb.c new file mode 100644 index 000000000000..274fe4249e35 --- /dev/null +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sb.c @@ -0,0 +1,135 @@ +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s + +#include <arm_sve.h> + +svint16_t test_svldnf1sb_s16(svbool_t pg, const int8_t *base) +{ + // CHECK-LABEL: test_svldnf1sb_s16 + // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg) + // CHECK: %[[LOAD:.*]] = call <vscale x 8 x i8> @llvm.aarch64.sve.ldnf1.nxv8i8(<vscale x 8 x i1> %[[PG]], i8* %base) + // CHECK: %[[SEXT:.*]] = sext <vscale x 8 x i8> %[[LOAD]] to <vscale x 8 x i16> + // CHECK: ret <vscale x 8 x i16> %[[SEXT]] + return svldnf1sb_s16(pg, base); +} + +svint32_t test_svldnf1sb_s32(svbool_t pg, const int8_t *base) +{ + // CHECK-LABEL: test_svldnf1sb_s32 + // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) + // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldnf1.nxv4i8(<vscale x 4 x i1> %[[PG]], i8* %base) + // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32> + // CHECK: ret <vscale x 4 x i32> %[[SEXT]] + return svldnf1sb_s32(pg, base); +} + +svint64_t test_svldnf1sb_s64(svbool_t pg, const int8_t *base) +{ + // CHECK-LABEL: test_svldnf1sb_s64 + // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) + // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnf1.nxv2i8(<vscale x 2 x i1> %[[PG]], i8* %base) + // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64> + // CHECK: ret <vscale x 2 x i64> %[[SEXT]] + return svldnf1sb_s64(pg, base); +} + +svuint16_t test_svldnf1sb_u16(svbool_t pg, const int8_t *base) +{ + // CHECK-LABEL: test_svldnf1sb_u16 + // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg) + // CHECK: %[[LOAD:.*]] = call <vscale x 8 x i8> @llvm.aarch64.sve.ldnf1.nxv8i8(<vscale x 8 x i1> %[[PG]], i8* %base) + // CHECK: %[[SEXT:.*]] = sext <vscale x 8 x i8> %[[LOAD]] to <vscale x 8 x i16> + // CHECK: ret <vscale x 8 x i16> %[[SEXT]] + return svldnf1sb_u16(pg, base); +} + +svuint32_t test_svldnf1sb_u32(svbool_t pg, const int8_t *base) +{ + // CHECK-LABEL: test_svldnf1sb_u32 + // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) + // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldnf1.nxv4i8(<vscale x 4 x i1> %[[PG]], i8* %base) + // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32> + // CHECK: ret <vscale x 4 x i32> %[[SEXT]] + return svldnf1sb_u32(pg, base); +} + +svuint64_t test_svldnf1sb_u64(svbool_t pg, const int8_t *base) +{ + // CHECK-LABEL: test_svldnf1sb_u64 + // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) + // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnf1.nxv2i8(<vscale x 2 x i1> %[[PG]], i8* %base) + // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64> + // CHECK: ret <vscale x 2 x i64> %[[SEXT]] + return svldnf1sb_u64(pg, base); +} + +svint16_t test_svldnf1sb_vnum_s16(svbool_t pg, const int8_t *base, int64_t vnum) +{ + // CHECK-LABEL: test_svldnf1sb_vnum_s16 + // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to <vscale x 8 x i8>* + // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 8 x i8>, <vscale x 8 x i8>* %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call <vscale x 8 x i8> @llvm.aarch64.sve.ldnf1.nxv8i8(<vscale x 8 x i1> %[[PG]], i8* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext <vscale x 8 x i8> %[[LOAD]] to <vscale x 8 x i16> + // CHECK: ret <vscale x 8 x i16> %[[SEXT]] + return svldnf1sb_vnum_s16(pg, base, vnum); +} + +svint32_t test_svldnf1sb_vnum_s32(svbool_t pg, const int8_t *base, int64_t vnum) +{ + // CHECK-LABEL: test_svldnf1sb_vnum_s32 + // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to <vscale x 4 x i8>* + // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 4 x i8>, <vscale x 4 x i8>* %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldnf1.nxv4i8(<vscale x 4 x i1> %[[PG]], i8* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32> + // CHECK: ret <vscale x 4 x i32> %[[SEXT]] + return svldnf1sb_vnum_s32(pg, base, vnum); +} + +svint64_t test_svldnf1sb_vnum_s64(svbool_t pg, const int8_t *base, int64_t vnum) +{ + // CHECK-LABEL: test_svldnf1sb_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to <vscale x 2 x i8>* + // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i8>, <vscale x 2 x i8>* %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnf1.nxv2i8(<vscale x 2 x i1> %[[PG]], i8* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64> + // CHECK: ret <vscale x 2 x i64> %[[SEXT]] + return svldnf1sb_vnum_s64(pg, base, vnum); +} + +svuint16_t test_svldnf1sb_vnum_u16(svbool_t pg, const int8_t *base, int64_t vnum) +{ + // CHECK-LABEL: test_svldnf1sb_vnum_u16 + // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to <vscale x 8 x i8>* + // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 8 x i8>, <vscale x 8 x i8>* %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call <vscale x 8 x i8> @llvm.aarch64.sve.ldnf1.nxv8i8(<vscale x 8 x i1> %[[PG]], i8* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext <vscale x 8 x i8> %[[LOAD]] to <vscale x 8 x i16> + // CHECK: ret <vscale x 8 x i16> %[[SEXT]] + return svldnf1sb_vnum_u16(pg, base, vnum); +} + +svuint32_t test_svldnf1sb_vnum_u32(svbool_t pg, const int8_t *base, int64_t vnum) +{ + // CHECK-LABEL: test_svldnf1sb_vnum_u32 + // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to <vscale x 4 x i8>* + // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 4 x i8>, <vscale x 4 x i8>* %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldnf1.nxv4i8(<vscale x 4 x i1> %[[PG]], i8* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32> + // CHECK: ret <vscale x 4 x i32> %[[SEXT]] + return svldnf1sb_vnum_u32(pg, base, vnum); +} + +svuint64_t test_svldnf1sb_vnum_u64(svbool_t pg, const int8_t *base, int64_t vnum) +{ + // CHECK-LABEL: test_svldnf1sb_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to <vscale x 2 x i8>* + // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i8>, <vscale x 2 x i8>* %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnf1.nxv2i8(<vscale x 2 x i1> %[[PG]], i8* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64> + // CHECK: ret <vscale x 2 x i64> %[[SEXT]] + return svldnf1sb_vnum_u64(pg, base, vnum); +} _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
