SjoerdMeijer added a comment. Let's separate out HasPA from SVEFeatures now while we are at it, probably it's more work to do this as a follow up, and after that this looks good to me.
Bonus points for adding some llvm-mca tests, see the `llvm-project/llvm/test/tools/llvm-mca/` directory for some inspiration how this latencies can be checked, but that seems like something for follow-up. ================ Comment at: llvm/lib/Target/AArch64/AArch64SchedThunderX3T110.td:1992 +def : InstRW<[THX3T110Write_11Cyc_LS01_I1], (instregex "^LDRAA", "^LDRAB")>; +// disable these instructions for the time being +// pending further decisions ---------------- just remove them then instead of commenting them out. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D78129/new/ https://reviews.llvm.org/D78129 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
