Author: Sander de Smalen Date: 2020-05-07T16:15:57+01:00 New Revision: 086722c18e4748f8d250806abbf8d7fa5c05e51f
URL: https://github.com/llvm/llvm-project/commit/086722c18e4748f8d250806abbf8d7fa5c05e51f DIFF: https://github.com/llvm/llvm-project/commit/086722c18e4748f8d250806abbf8d7fa5c05e51f.diff LOG: [SveEmitter] Add builtins for SVE2 Floating-point widening multiply-accumulate This patch adds builtins for: - svmlalb, svmlalb_lane - svmlalt, svmlalt_lane - svmlslb, svmlslb_lane - svmlslt, svmlslt_lane Added: Modified: clang/include/clang/Basic/arm_sve.td clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_mlalb.c clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_mlalt.c clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_mlslb.c clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_mlslt.c Removed: ################################################################################ diff --git a/clang/include/clang/Basic/arm_sve.td b/clang/include/clang/Basic/arm_sve.td index 880ca4e19f3d..6f436f7f9ff4 100644 --- a/clang/include/clang/Basic/arm_sve.td +++ b/clang/include/clang/Basic/arm_sve.td @@ -1717,6 +1717,24 @@ def SVCDOT_LANE : SInst<"svcdot_lane[_{d}]", "ddqqii", "il", MergeNone, "aarch ImmCheck<3, ImmCheckLaneIndexDot, 2>]>; } +//////////////////////////////////////////////////////////////////////////////// +// SVE2 - Floating-point widening multiply-accumulate + +let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { +def SVMLALB_F : SInst<"svmlalb[_{d}]", "ddhh", "f", MergeNone, "aarch64_sve_fmlalb">; +def SVMLALB_F_N : SInst<"svmlalb[_n_{d}]", "ddhR", "f", MergeNone, "aarch64_sve_fmlalb">; +def SVMLALB_F_LANE : SInst<"svmlalb_lane[_{d}]", "ddhhi", "f", MergeNone, "aarch64_sve_fmlalb_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVMLALT_F : SInst<"svmlalt[_{d}]", "ddhh", "f", MergeNone, "aarch64_sve_fmlalt">; +def SVMLALT_F_N : SInst<"svmlalt[_n_{d}]", "ddhR", "f", MergeNone, "aarch64_sve_fmlalt">; +def SVMLALT_F_LANE : SInst<"svmlalt_lane[_{d}]", "ddhhi", "f", MergeNone, "aarch64_sve_fmlalt_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVMLSLB_F : SInst<"svmlslb[_{d}]", "ddhh", "f", MergeNone, "aarch64_sve_fmlslb">; +def SVMLSLB_F_N : SInst<"svmlslb[_n_{d}]", "ddhR", "f", MergeNone, "aarch64_sve_fmlslb">; +def SVMLSLB_F_LANE : SInst<"svmlslb_lane[_{d}]", "ddhhi", "f", MergeNone, "aarch64_sve_fmlslb_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +def SVMLSLT_F : SInst<"svmlslt[_{d}]", "ddhh", "f", MergeNone, "aarch64_sve_fmlslt">; +def SVMLSLT_F_N : SInst<"svmlslt[_n_{d}]", "ddhR", "f", MergeNone, "aarch64_sve_fmlslt">; +def SVMLSLT_F_LANE : SInst<"svmlslt_lane[_{d}]", "ddhhi", "f", MergeNone, "aarch64_sve_fmlslt_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>; +} + //////////////////////////////////////////////////////////////////////////////// // SVE2 - Contiguous conflict detection let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c index 497d7eba5849..e4f80eb639de 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c @@ -217,3 +217,44 @@ svuint64_t test_svmlalb_lane_u64_1(svuint64_t op1, svuint32_t op2, svuint32_t op // expected-warning@+1 {{implicit declaration of function 'svmlalb_lane_u64'}} return SVE_ACLE_FUNC(svmlalb_lane,_u64,,)(op1, op2, op3, 3); } + +svfloat32_t test_svmlalb_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) +{ + // CHECK-LABEL: test_svmlalb_f32 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmlalb.nxv4f32(<vscale x 4 x float> %op1, <vscale x 8 x half> %op2, <vscale x 8 x half> %op3) + // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svmlalb'}} + // expected-warning@+1 {{implicit declaration of function 'svmlalb_f32'}} + return SVE_ACLE_FUNC(svmlalb,_f32,,)(op1, op2, op3); +} + +svfloat32_t test_svmlalb_n_f32(svfloat32_t op1, svfloat16_t op2, float16_t op3) +{ + // CHECK-LABEL: test_svmlalb_n_f32 + // CHECK: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmlalb.nxv4f32(<vscale x 4 x float> %op1, <vscale x 8 x half> %op2, <vscale x 8 x half> %[[DUP]]) + // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svmlalb'}} + // expected-warning@+1 {{implicit declaration of function 'svmlalb_n_f32'}} + return SVE_ACLE_FUNC(svmlalb,_n_f32,,)(op1, op2, op3); +} + +svfloat32_t test_svmlalb_lane_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) +{ + // CHECK-LABEL: test_svmlalb_lane_f32 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmlalb.lane.nxv4f32(<vscale x 4 x float> %op1, <vscale x 8 x half> %op2, <vscale x 8 x half> %op3, i32 0) + // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svmlalb_lane'}} + // expected-warning@+1 {{implicit declaration of function 'svmlalb_lane_f32'}} + return SVE_ACLE_FUNC(svmlalb_lane,_f32,,)(op1, op2, op3, 0); +} + +svfloat32_t test_svmlalb_lane_f32_1(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) +{ + // CHECK-LABEL: test_svmlalb_lane_f32_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmlalb.lane.nxv4f32(<vscale x 4 x float> %op1, <vscale x 8 x half> %op2, <vscale x 8 x half> %op3, i32 7) + // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svmlalb_lane'}} + // expected-warning@+1 {{implicit declaration of function 'svmlalb_lane_f32'}} + return SVE_ACLE_FUNC(svmlalb_lane,_f32,,)(op1, op2, op3, 7); +} diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c index aaceed871a36..49f67536d176 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c @@ -217,3 +217,44 @@ svuint64_t test_svmlalt_lane_u64_1(svuint64_t op1, svuint32_t op2, svuint32_t op // expected-warning@+1 {{implicit declaration of function 'svmlalt_lane_u64'}} return SVE_ACLE_FUNC(svmlalt_lane,_u64,,)(op1, op2, op3, 3); } + +svfloat32_t test_svmlalt_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) +{ + // CHECK-LABEL: test_svmlalt_f32 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmlalt.nxv4f32(<vscale x 4 x float> %op1, <vscale x 8 x half> %op2, <vscale x 8 x half> %op3) + // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svmlalt'}} + // expected-warning@+1 {{implicit declaration of function 'svmlalt_f32'}} + return SVE_ACLE_FUNC(svmlalt,_f32,,)(op1, op2, op3); +} + +svfloat32_t test_svmlalt_n_f32(svfloat32_t op1, svfloat16_t op2, float16_t op3) +{ + // CHECK-LABEL: test_svmlalt_n_f32 + // CHECK: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmlalt.nxv4f32(<vscale x 4 x float> %op1, <vscale x 8 x half> %op2, <vscale x 8 x half> %[[DUP]]) + // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svmlalt'}} + // expected-warning@+1 {{implicit declaration of function 'svmlalt_n_f32'}} + return SVE_ACLE_FUNC(svmlalt,_n_f32,,)(op1, op2, op3); +} + +svfloat32_t test_svmlalt_lane_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) +{ + // CHECK-LABEL: test_svmlalt_lane_f32 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmlalt.lane.nxv4f32(<vscale x 4 x float> %op1, <vscale x 8 x half> %op2, <vscale x 8 x half> %op3, i32 0) + // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svmlalt_lane'}} + // expected-warning@+1 {{implicit declaration of function 'svmlalt_lane_f32'}} + return SVE_ACLE_FUNC(svmlalt_lane,_f32,,)(op1, op2, op3, 0); +} + +svfloat32_t test_svmlalt_lane_f32_1(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) +{ + // CHECK-LABEL: test_svmlalt_lane_f32_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmlalt.lane.nxv4f32(<vscale x 4 x float> %op1, <vscale x 8 x half> %op2, <vscale x 8 x half> %op3, i32 7) + // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svmlalt_lane'}} + // expected-warning@+1 {{implicit declaration of function 'svmlalt_lane_f32'}} + return SVE_ACLE_FUNC(svmlalt_lane,_f32,,)(op1, op2, op3, 7); +} diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c index f4d49194cc2f..429569e306d8 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c @@ -217,3 +217,44 @@ svuint64_t test_svmlslb_lane_u64_1(svuint64_t op1, svuint32_t op2, svuint32_t op // expected-warning@+1 {{implicit declaration of function 'svmlslb_lane_u64'}} return SVE_ACLE_FUNC(svmlslb_lane,_u64,,)(op1, op2, op3, 3); } + +svfloat32_t test_svmlslb_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) +{ + // CHECK-LABEL: test_svmlslb_f32 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmlslb.nxv4f32(<vscale x 4 x float> %op1, <vscale x 8 x half> %op2, <vscale x 8 x half> %op3) + // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svmlslb'}} + // expected-warning@+1 {{implicit declaration of function 'svmlslb_f32'}} + return SVE_ACLE_FUNC(svmlslb,_f32,,)(op1, op2, op3); +} + +svfloat32_t test_svmlslb_n_f32(svfloat32_t op1, svfloat16_t op2, float16_t op3) +{ + // CHECK-LABEL: test_svmlslb_n_f32 + // CHECK: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmlslb.nxv4f32(<vscale x 4 x float> %op1, <vscale x 8 x half> %op2, <vscale x 8 x half> %[[DUP]]) + // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svmlslb'}} + // expected-warning@+1 {{implicit declaration of function 'svmlslb_n_f32'}} + return SVE_ACLE_FUNC(svmlslb,_n_f32,,)(op1, op2, op3); +} + +svfloat32_t test_svmlslb_lane_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) +{ + // CHECK-LABEL: test_svmlslb_lane_f32 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmlslb.lane.nxv4f32(<vscale x 4 x float> %op1, <vscale x 8 x half> %op2, <vscale x 8 x half> %op3, i32 0) + // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svmlslb_lane'}} + // expected-warning@+1 {{implicit declaration of function 'svmlslb_lane_f32'}} + return SVE_ACLE_FUNC(svmlslb_lane,_f32,,)(op1, op2, op3, 0); +} + +svfloat32_t test_svmlslb_lane_f32_1(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) +{ + // CHECK-LABEL: test_svmlslb_lane_f32_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmlslb.lane.nxv4f32(<vscale x 4 x float> %op1, <vscale x 8 x half> %op2, <vscale x 8 x half> %op3, i32 7) + // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svmlslb_lane'}} + // expected-warning@+1 {{implicit declaration of function 'svmlslb_lane_f32'}} + return SVE_ACLE_FUNC(svmlslb_lane,_f32,,)(op1, op2, op3, 7); +} diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c index 1a3583e38714..4bca3ae5aefb 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c @@ -217,3 +217,44 @@ svuint64_t test_svmlslt_lane_u64_1(svuint64_t op1, svuint32_t op2, svuint32_t op // expected-warning@+1 {{implicit declaration of function 'svmlslt_lane_u64'}} return SVE_ACLE_FUNC(svmlslt_lane,_u64,,)(op1, op2, op3, 3); } + +svfloat32_t test_svmlslt_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) +{ + // CHECK-LABEL: test_svmlslt_f32 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmlslt.nxv4f32(<vscale x 4 x float> %op1, <vscale x 8 x half> %op2, <vscale x 8 x half> %op3) + // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svmlslt'}} + // expected-warning@+1 {{implicit declaration of function 'svmlslt_f32'}} + return SVE_ACLE_FUNC(svmlslt,_f32,,)(op1, op2, op3); +} + +svfloat32_t test_svmlslt_n_f32(svfloat32_t op1, svfloat16_t op2, float16_t op3) +{ + // CHECK-LABEL: test_svmlslt_n_f32 + // CHECK: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmlslt.nxv4f32(<vscale x 4 x float> %op1, <vscale x 8 x half> %op2, <vscale x 8 x half> %[[DUP]]) + // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svmlslt'}} + // expected-warning@+1 {{implicit declaration of function 'svmlslt_n_f32'}} + return SVE_ACLE_FUNC(svmlslt,_n_f32,,)(op1, op2, op3); +} + +svfloat32_t test_svmlslt_lane_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) +{ + // CHECK-LABEL: test_svmlslt_lane_f32 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmlslt.lane.nxv4f32(<vscale x 4 x float> %op1, <vscale x 8 x half> %op2, <vscale x 8 x half> %op3, i32 0) + // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svmlslt_lane'}} + // expected-warning@+1 {{implicit declaration of function 'svmlslt_lane_f32'}} + return SVE_ACLE_FUNC(svmlslt_lane,_f32,,)(op1, op2, op3, 0); +} + +svfloat32_t test_svmlslt_lane_f32_1(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) +{ + // CHECK-LABEL: test_svmlslt_lane_f32_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmlslt.lane.nxv4f32(<vscale x 4 x float> %op1, <vscale x 8 x half> %op2, <vscale x 8 x half> %op3, i32 7) + // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svmlslt_lane'}} + // expected-warning@+1 {{implicit declaration of function 'svmlslt_lane_f32'}} + return SVE_ACLE_FUNC(svmlslt_lane,_f32,,)(op1, op2, op3, 7); +} diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_mlalb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_mlalb.c index 01eca35e4685..17b8282c6001 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_mlalb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_mlalb.c @@ -33,3 +33,15 @@ svuint64_t test_svmlalb_lane_u64(svuint64_t op1, svuint32_t op2, svuint32_t op3) // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 3]}} return SVE_ACLE_FUNC(svmlalb_lane,_u64,,)(op1, op2, op3, 4); } + +svfloat32_t test_svmlalb_lane_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) +{ + // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 7]}} + return SVE_ACLE_FUNC(svmlalb_lane,_f32,,)(op1, op2, op3, -1); +} + +svfloat32_t test_svmlalb_lane_f32_1(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) +{ + // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 7]}} + return SVE_ACLE_FUNC(svmlalb_lane,_f32,,)(op1, op2, op3, 8); +} diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_mlalt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_mlalt.c index 52ebade2dd74..f93de7cdf8d2 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_mlalt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_mlalt.c @@ -33,3 +33,15 @@ svuint64_t test_svmlalt_lane_u64(svuint64_t op1, svuint32_t op2, svuint32_t op3) // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 3]}} return SVE_ACLE_FUNC(svmlalt_lane,_u64,,)(op1, op2, op3, 4); } + +svfloat32_t test_svmlalt_lane_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) +{ + // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 7]}} + return SVE_ACLE_FUNC(svmlalt_lane,_f32,,)(op1, op2, op3, -1); +} + +svfloat32_t test_svmlalt_lane_f32_1(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) +{ + // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 7]}} + return SVE_ACLE_FUNC(svmlalt_lane,_f32,,)(op1, op2, op3, 8); +} diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_mlslb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_mlslb.c index f27e09476b80..d6c44447dd02 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_mlslb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_mlslb.c @@ -33,3 +33,15 @@ svuint64_t test_svmlslb_lane_u64(svuint64_t op1, svuint32_t op2, svuint32_t op3) // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 3]}} return SVE_ACLE_FUNC(svmlslb_lane,_u64,,)(op1, op2, op3, 4); } + +svfloat32_t test_svmlslb_lane_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) +{ + // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 7]}} + return SVE_ACLE_FUNC(svmlslb_lane,_f32,,)(op1, op2, op3, -1); +} + +svfloat32_t test_svmlslb_lane_f32_1(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) +{ + // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 7]}} + return SVE_ACLE_FUNC(svmlslb_lane,_f32,,)(op1, op2, op3, 8); +} diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_mlslt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_mlslt.c index f774436d2933..5ac82f7c48d7 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_mlslt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_mlslt.c @@ -33,3 +33,15 @@ svuint64_t test_svmlslt_lane_u64(svuint64_t op1, svuint32_t op2, svuint32_t op3) // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 3]}} return SVE_ACLE_FUNC(svmlslt_lane,_u64,,)(op1, op2, op3, 4); } + +svfloat32_t test_svmlslt_lane_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) +{ + // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 7]}} + return SVE_ACLE_FUNC(svmlslt_lane,_f32,,)(op1, op2, op3, -1); +} + +svfloat32_t test_svmlslt_lane_f32_1(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) +{ + // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 7]}} + return SVE_ACLE_FUNC(svmlslt_lane,_f32,,)(op1, op2, op3, 8); +} _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
