Author: Sander de Smalen Date: 2020-05-07T16:09:31+01:00 New Revision: ce7f50c2ce186ade48a3aba9c28a981978ec527a
URL: https://github.com/llvm/llvm-project/commit/ce7f50c2ce186ade48a3aba9c28a981978ec527a DIFF: https://github.com/llvm/llvm-project/commit/ce7f50c2ce186ade48a3aba9c28a981978ec527a.diff LOG: [SveEmitter] Add builtins for SVE2 Uniform complex integer arithmetic This patch adds builtins for: - svcadd - svqcadd - svcmla - svcmla_lane - svqrdcmlah - svqrdcmlah_lane Added: clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cadd.c clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cmla.c clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qcadd.c clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdcmlah.c clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_cadd.c clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_cmla.c clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_qcadd.c clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_qrdcmlah.c Modified: clang/include/clang/Basic/arm_sve.td Removed: ################################################################################ diff --git a/clang/include/clang/Basic/arm_sve.td b/clang/include/clang/Basic/arm_sve.td index a271ad9cfb1b..4094c0b5f9c3 100644 --- a/clang/include/clang/Basic/arm_sve.td +++ b/clang/include/clang/Basic/arm_sve.td @@ -1405,6 +1405,19 @@ def SVMLS_LANE_2 : SInst<"svmls_lane[_{d}]", "ddddi", "silUsUiUl", MergeNone, "a def SVMUL_LANE_2 : SInst<"svmul_lane[_{d}]", "dddi", "silUsUiUl", MergeNone, "aarch64_sve_mul_lane", [], [ImmCheck<2, ImmCheckLaneIndex, 1>]>; } +//////////////////////////////////////////////////////////////////////////////// +// SVE2 - Uniform complex integer arithmetic +let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { +def SVCADD : SInst<"svcadd[_{d}]", "dddi", "csilUcUsUiUl", MergeNone, "aarch64_sve_cadd_x", [], [ImmCheck<2, ImmCheckComplexRot90_270>]>; +def SVSQCADD : SInst<"svqcadd[_{d}]", "dddi", "csil", MergeNone, "aarch64_sve_sqcadd_x", [], [ImmCheck<2, ImmCheckComplexRot90_270>]>; +def SVCMLA : SInst<"svcmla[_{d}]", "ddddi", "csilUcUsUiUl", MergeNone, "aarch64_sve_cmla_x", [], [ImmCheck<3, ImmCheckComplexRotAll90>]>; +def SVCMLA_LANE_X : SInst<"svcmla_lane[_{d}]", "ddddii", "siUsUi", MergeNone, "aarch64_sve_cmla_lane_x", [], [ImmCheck<3, ImmCheckLaneIndexCompRotate, 2>, + ImmCheck<4, ImmCheckComplexRotAll90>]>; +def SVSQRDCMLAH_X : SInst<"svqrdcmlah[_{d}]", "ddddi", "csil", MergeNone, "aarch64_sve_sqrdcmlah_x", [], [ImmCheck<3, ImmCheckComplexRotAll90>]>; +def SVSQRDCMLAH_LANE_X : SInst<"svqrdcmlah_lane[_{d}]", "ddddii", "si", MergeNone, "aarch64_sve_sqrdcmlah_lane_x", [], [ImmCheck<3, ImmCheckLaneIndexCompRotate, 2>, + ImmCheck<4, ImmCheckComplexRotAll90>]>; +} + //////////////////////////////////////////////////////////////////////////////// // SVE2 - Non-temporal gather/scatter let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cadd.c new file mode 100644 index 000000000000..01c14f863666 --- /dev/null +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cadd.c @@ -0,0 +1,173 @@ +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s + +#include <arm_sve.h> + +#ifdef SVE_OVERLOADED_FORMS +// A simple used,unused... macro, long enough to represent any SVE builtin. +#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3 +#else +#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 +#endif + +svint8_t test_svcadd_s8(svint8_t op1, svint8_t op2) +{ + // CHECK-LABEL: test_svcadd_s8 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.cadd.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2, i32 90) + // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svcadd'}} + // expected-warning@+1 {{implicit declaration of function 'svcadd_s8'}} + return SVE_ACLE_FUNC(svcadd,_s8,,)(op1, op2, 90); +} + +svint8_t test_svcadd_s8_1(svint8_t op1, svint8_t op2) +{ + // CHECK-LABEL: test_svcadd_s8_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.cadd.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2, i32 270) + // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svcadd'}} + // expected-warning@+1 {{implicit declaration of function 'svcadd_s8'}} + return SVE_ACLE_FUNC(svcadd,_s8,,)(op1, op2, 270); +} + +svint16_t test_svcadd_s16(svint16_t op1, svint16_t op2) +{ + // CHECK-LABEL: test_svcadd_s16 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.cadd.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2, i32 90) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svcadd'}} + // expected-warning@+1 {{implicit declaration of function 'svcadd_s16'}} + return SVE_ACLE_FUNC(svcadd,_s16,,)(op1, op2, 90); +} + +svint16_t test_svcadd_s16_1(svint16_t op1, svint16_t op2) +{ + // CHECK-LABEL: test_svcadd_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.cadd.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2, i32 270) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svcadd'}} + // expected-warning@+1 {{implicit declaration of function 'svcadd_s16'}} + return SVE_ACLE_FUNC(svcadd,_s16,,)(op1, op2, 270); +} + +svint32_t test_svcadd_s32(svint32_t op1, svint32_t op2) +{ + // CHECK-LABEL: test_svcadd_s32 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.cadd.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2, i32 90) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svcadd'}} + // expected-warning@+1 {{implicit declaration of function 'svcadd_s32'}} + return SVE_ACLE_FUNC(svcadd,_s32,,)(op1, op2, 90); +} + +svint32_t test_svcadd_s32_1(svint32_t op1, svint32_t op2) +{ + // CHECK-LABEL: test_svcadd_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.cadd.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2, i32 270) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svcadd'}} + // expected-warning@+1 {{implicit declaration of function 'svcadd_s32'}} + return SVE_ACLE_FUNC(svcadd,_s32,,)(op1, op2, 270); +} + +svint64_t test_svcadd_s64(svint64_t op1, svint64_t op2) +{ + // CHECK-LABEL: test_svcadd_s64 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.cadd.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2, i32 90) + // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svcadd'}} + // expected-warning@+1 {{implicit declaration of function 'svcadd_s64'}} + return SVE_ACLE_FUNC(svcadd,_s64,,)(op1, op2, 90); +} + +svint64_t test_svcadd_s64_1(svint64_t op1, svint64_t op2) +{ + // CHECK-LABEL: test_svcadd_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.cadd.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2, i32 270) + // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svcadd'}} + // expected-warning@+1 {{implicit declaration of function 'svcadd_s64'}} + return SVE_ACLE_FUNC(svcadd,_s64,,)(op1, op2, 270); +} + +svuint8_t test_svcadd_u8(svuint8_t op1, svuint8_t op2) +{ + // CHECK-LABEL: test_svcadd_u8 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.cadd.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2, i32 90) + // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svcadd'}} + // expected-warning@+1 {{implicit declaration of function 'svcadd_u8'}} + return SVE_ACLE_FUNC(svcadd,_u8,,)(op1, op2, 90); +} + +svuint8_t test_svcadd_u8_1(svuint8_t op1, svuint8_t op2) +{ + // CHECK-LABEL: test_svcadd_u8_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.cadd.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2, i32 270) + // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svcadd'}} + // expected-warning@+1 {{implicit declaration of function 'svcadd_u8'}} + return SVE_ACLE_FUNC(svcadd,_u8,,)(op1, op2, 270); +} + +svuint16_t test_svcadd_u16(svuint16_t op1, svuint16_t op2) +{ + // CHECK-LABEL: test_svcadd_u16 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.cadd.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2, i32 90) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svcadd'}} + // expected-warning@+1 {{implicit declaration of function 'svcadd_u16'}} + return SVE_ACLE_FUNC(svcadd,_u16,,)(op1, op2, 90); +} + +svuint16_t test_svcadd_u16_1(svuint16_t op1, svuint16_t op2) +{ + // CHECK-LABEL: test_svcadd_u16_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.cadd.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2, i32 270) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svcadd'}} + // expected-warning@+1 {{implicit declaration of function 'svcadd_u16'}} + return SVE_ACLE_FUNC(svcadd,_u16,,)(op1, op2, 270); +} + +svuint32_t test_svcadd_u32(svuint32_t op1, svuint32_t op2) +{ + // CHECK-LABEL: test_svcadd_u32 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.cadd.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2, i32 90) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svcadd'}} + // expected-warning@+1 {{implicit declaration of function 'svcadd_u32'}} + return SVE_ACLE_FUNC(svcadd,_u32,,)(op1, op2, 90); +} + +svuint32_t test_svcadd_u32_1(svuint32_t op1, svuint32_t op2) +{ + // CHECK-LABEL: test_svcadd_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.cadd.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2, i32 270) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svcadd'}} + // expected-warning@+1 {{implicit declaration of function 'svcadd_u32'}} + return SVE_ACLE_FUNC(svcadd,_u32,,)(op1, op2, 270); +} + +svuint64_t test_svcadd_u64(svuint64_t op1, svuint64_t op2) +{ + // CHECK-LABEL: test_svcadd_u64 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.cadd.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2, i32 90) + // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svcadd'}} + // expected-warning@+1 {{implicit declaration of function 'svcadd_u64'}} + return SVE_ACLE_FUNC(svcadd,_u64,,)(op1, op2, 90); +} + +svuint64_t test_svcadd_u64_1(svuint64_t op1, svuint64_t op2) +{ + // CHECK-LABEL: test_svcadd_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.cadd.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2, i32 270) + // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svcadd'}} + // expected-warning@+1 {{implicit declaration of function 'svcadd_u64'}} + return SVE_ACLE_FUNC(svcadd,_u64,,)(op1, op2, 270); +} diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cmla.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cmla.c new file mode 100644 index 000000000000..4ce43feb6114 --- /dev/null +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cmla.c @@ -0,0 +1,372 @@ +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s + +#include <arm_sve.h> + +#ifdef SVE_OVERLOADED_FORMS +// A simple used,unused... macro, long enough to represent any SVE builtin. +#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3 +#else +#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 +#endif + +svint8_t test_svcmla_s8(svint8_t op1, svint8_t op2, svint8_t op3) +{ + // CHECK-LABEL: test_svcmla_s8 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.cmla.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2, <vscale x 16 x i8> %op3, i32 0) + // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_s8'}} + return SVE_ACLE_FUNC(svcmla,_s8,,)(op1, op2, op3, 0); +} + +svint8_t test_svcmla_s8_1(svint8_t op1, svint8_t op2, svint8_t op3) +{ + // CHECK-LABEL: test_svcmla_s8_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.cmla.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2, <vscale x 16 x i8> %op3, i32 90) + // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_s8'}} + return SVE_ACLE_FUNC(svcmla,_s8,,)(op1, op2, op3, 90); +} + +svint8_t test_svcmla_s8_2(svint8_t op1, svint8_t op2, svint8_t op3) +{ + // CHECK-LABEL: test_svcmla_s8_2 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.cmla.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2, <vscale x 16 x i8> %op3, i32 180) + // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_s8'}} + return SVE_ACLE_FUNC(svcmla,_s8,,)(op1, op2, op3, 180); +} + +svint8_t test_svcmla_s8_3(svint8_t op1, svint8_t op2, svint8_t op3) +{ + // CHECK-LABEL: test_svcmla_s8_3 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.cmla.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2, <vscale x 16 x i8> %op3, i32 270) + // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_s8'}} + return SVE_ACLE_FUNC(svcmla,_s8,,)(op1, op2, op3, 270); +} + +svint16_t test_svcmla_s16(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // CHECK-LABEL: test_svcmla_s16 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.cmla.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2, <vscale x 8 x i16> %op3, i32 0) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_s16'}} + return SVE_ACLE_FUNC(svcmla,_s16,,)(op1, op2, op3, 0); +} + +svint16_t test_svcmla_s16_1(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // CHECK-LABEL: test_svcmla_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.cmla.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2, <vscale x 8 x i16> %op3, i32 90) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_s16'}} + return SVE_ACLE_FUNC(svcmla,_s16,,)(op1, op2, op3, 90); +} + +svint16_t test_svcmla_s16_2(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // CHECK-LABEL: test_svcmla_s16_2 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.cmla.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2, <vscale x 8 x i16> %op3, i32 180) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_s16'}} + return SVE_ACLE_FUNC(svcmla,_s16,,)(op1, op2, op3, 180); +} + +svint16_t test_svcmla_s16_3(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // CHECK-LABEL: test_svcmla_s16_3 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.cmla.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2, <vscale x 8 x i16> %op3, i32 270) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_s16'}} + return SVE_ACLE_FUNC(svcmla,_s16,,)(op1, op2, op3, 270); +} + +svint32_t test_svcmla_s32(svint32_t op1, svint32_t op2, svint32_t op3) +{ + // CHECK-LABEL: test_svcmla_s32 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.cmla.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2, <vscale x 4 x i32> %op3, i32 0) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_s32'}} + return SVE_ACLE_FUNC(svcmla,_s32,,)(op1, op2, op3, 0); +} + +svint32_t test_svcmla_s32_1(svint32_t op1, svint32_t op2, svint32_t op3) +{ + // CHECK-LABEL: test_svcmla_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.cmla.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2, <vscale x 4 x i32> %op3, i32 90) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_s32'}} + return SVE_ACLE_FUNC(svcmla,_s32,,)(op1, op2, op3, 90); +} + +svint32_t test_svcmla_s32_2(svint32_t op1, svint32_t op2, svint32_t op3) +{ + // CHECK-LABEL: test_svcmla_s32_2 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.cmla.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2, <vscale x 4 x i32> %op3, i32 180) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_s32'}} + return SVE_ACLE_FUNC(svcmla,_s32,,)(op1, op2, op3, 180); +} + +svint32_t test_svcmla_s32_3(svint32_t op1, svint32_t op2, svint32_t op3) +{ + // CHECK-LABEL: test_svcmla_s32_3 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.cmla.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2, <vscale x 4 x i32> %op3, i32 270) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_s32'}} + return SVE_ACLE_FUNC(svcmla,_s32,,)(op1, op2, op3, 270); +} + +svint64_t test_svcmla_s64(svint64_t op1, svint64_t op2, svint64_t op3) +{ + // CHECK-LABEL: test_svcmla_s64 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.cmla.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2, <vscale x 2 x i64> %op3, i32 0) + // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_s64'}} + return SVE_ACLE_FUNC(svcmla,_s64,,)(op1, op2, op3, 0); +} + +svint64_t test_svcmla_s64_1(svint64_t op1, svint64_t op2, svint64_t op3) +{ + // CHECK-LABEL: test_svcmla_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.cmla.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2, <vscale x 2 x i64> %op3, i32 90) + // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_s64'}} + return SVE_ACLE_FUNC(svcmla,_s64,,)(op1, op2, op3, 90); +} + +svint64_t test_svcmla_s64_2(svint64_t op1, svint64_t op2, svint64_t op3) +{ + // CHECK-LABEL: test_svcmla_s64_2 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.cmla.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2, <vscale x 2 x i64> %op3, i32 180) + // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_s64'}} + return SVE_ACLE_FUNC(svcmla,_s64,,)(op1, op2, op3, 180); +} + +svint64_t test_svcmla_s64_3(svint64_t op1, svint64_t op2, svint64_t op3) +{ + // CHECK-LABEL: test_svcmla_s64_3 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.cmla.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2, <vscale x 2 x i64> %op3, i32 270) + // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_s64'}} + return SVE_ACLE_FUNC(svcmla,_s64,,)(op1, op2, op3, 270); +} + +svuint8_t test_svcmla_u8(svuint8_t op1, svuint8_t op2, svuint8_t op3) +{ + // CHECK-LABEL: test_svcmla_u8 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.cmla.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2, <vscale x 16 x i8> %op3, i32 0) + // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_u8'}} + return SVE_ACLE_FUNC(svcmla,_u8,,)(op1, op2, op3, 0); +} + +svuint8_t test_svcmla_u8_1(svuint8_t op1, svuint8_t op2, svuint8_t op3) +{ + // CHECK-LABEL: test_svcmla_u8_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.cmla.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2, <vscale x 16 x i8> %op3, i32 90) + // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_u8'}} + return SVE_ACLE_FUNC(svcmla,_u8,,)(op1, op2, op3, 90); +} + +svuint8_t test_svcmla_u8_2(svuint8_t op1, svuint8_t op2, svuint8_t op3) +{ + // CHECK-LABEL: test_svcmla_u8_2 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.cmla.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2, <vscale x 16 x i8> %op3, i32 180) + // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_u8'}} + return SVE_ACLE_FUNC(svcmla,_u8,,)(op1, op2, op3, 180); +} + +svuint8_t test_svcmla_u8_3(svuint8_t op1, svuint8_t op2, svuint8_t op3) +{ + // CHECK-LABEL: test_svcmla_u8_3 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.cmla.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2, <vscale x 16 x i8> %op3, i32 270) + // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_u8'}} + return SVE_ACLE_FUNC(svcmla,_u8,,)(op1, op2, op3, 270); +} + +svuint16_t test_svcmla_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) +{ + // CHECK-LABEL: test_svcmla_u16 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.cmla.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2, <vscale x 8 x i16> %op3, i32 0) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_u16'}} + return SVE_ACLE_FUNC(svcmla,_u16,,)(op1, op2, op3, 0); +} + +svuint16_t test_svcmla_u16_1(svuint16_t op1, svuint16_t op2, svuint16_t op3) +{ + // CHECK-LABEL: test_svcmla_u16_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.cmla.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2, <vscale x 8 x i16> %op3, i32 90) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_u16'}} + return SVE_ACLE_FUNC(svcmla,_u16,,)(op1, op2, op3, 90); +} + +svuint16_t test_svcmla_u16_2(svuint16_t op1, svuint16_t op2, svuint16_t op3) +{ + // CHECK-LABEL: test_svcmla_u16_2 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.cmla.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2, <vscale x 8 x i16> %op3, i32 180) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_u16'}} + return SVE_ACLE_FUNC(svcmla,_u16,,)(op1, op2, op3, 180); +} + +svuint16_t test_svcmla_u16_3(svuint16_t op1, svuint16_t op2, svuint16_t op3) +{ + // CHECK-LABEL: test_svcmla_u16_3 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.cmla.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2, <vscale x 8 x i16> %op3, i32 270) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_u16'}} + return SVE_ACLE_FUNC(svcmla,_u16,,)(op1, op2, op3, 270); +} + +svuint32_t test_svcmla_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) +{ + // CHECK-LABEL: test_svcmla_u32 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.cmla.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2, <vscale x 4 x i32> %op3, i32 0) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_u32'}} + return SVE_ACLE_FUNC(svcmla,_u32,,)(op1, op2, op3, 0); +} + +svuint32_t test_svcmla_u32_1(svuint32_t op1, svuint32_t op2, svuint32_t op3) +{ + // CHECK-LABEL: test_svcmla_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.cmla.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2, <vscale x 4 x i32> %op3, i32 90) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_u32'}} + return SVE_ACLE_FUNC(svcmla,_u32,,)(op1, op2, op3, 90); +} + +svuint32_t test_svcmla_u32_2(svuint32_t op1, svuint32_t op2, svuint32_t op3) +{ + // CHECK-LABEL: test_svcmla_u32_2 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.cmla.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2, <vscale x 4 x i32> %op3, i32 180) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_u32'}} + return SVE_ACLE_FUNC(svcmla,_u32,,)(op1, op2, op3, 180); +} + +svuint32_t test_svcmla_u32_3(svuint32_t op1, svuint32_t op2, svuint32_t op3) +{ + // CHECK-LABEL: test_svcmla_u32_3 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.cmla.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2, <vscale x 4 x i32> %op3, i32 270) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_u32'}} + return SVE_ACLE_FUNC(svcmla,_u32,,)(op1, op2, op3, 270); +} + +svuint64_t test_svcmla_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) +{ + // CHECK-LABEL: test_svcmla_u64 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.cmla.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2, <vscale x 2 x i64> %op3, i32 0) + // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_u64'}} + return SVE_ACLE_FUNC(svcmla,_u64,,)(op1, op2, op3, 0); +} + +svuint64_t test_svcmla_u64_1(svuint64_t op1, svuint64_t op2, svuint64_t op3) +{ + // CHECK-LABEL: test_svcmla_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.cmla.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2, <vscale x 2 x i64> %op3, i32 90) + // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_u64'}} + return SVE_ACLE_FUNC(svcmla,_u64,,)(op1, op2, op3, 90); +} + +svuint64_t test_svcmla_u64_2(svuint64_t op1, svuint64_t op2, svuint64_t op3) +{ + // CHECK-LABEL: test_svcmla_u64_2 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.cmla.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2, <vscale x 2 x i64> %op3, i32 180) + // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_u64'}} + return SVE_ACLE_FUNC(svcmla,_u64,,)(op1, op2, op3, 180); +} + +svuint64_t test_svcmla_u64_3(svuint64_t op1, svuint64_t op2, svuint64_t op3) +{ + // CHECK-LABEL: test_svcmla_u64_3 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.cmla.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2, <vscale x 2 x i64> %op3, i32 270) + // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_u64'}} + return SVE_ACLE_FUNC(svcmla,_u64,,)(op1, op2, op3, 270); +} + +svint16_t test_svcmla_lane_s16(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // CHECK-LABEL: test_svcmla_lane_s16 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.cmla.lane.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2, <vscale x 8 x i16> %op3, i32 0, i32 90) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_lane_s16'}} + return SVE_ACLE_FUNC(svcmla_lane,_s16,,)(op1, op2, op3, 0, 90); +} + +svint16_t test_svcmla_lane_s16_1(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // CHECK-LABEL: test_svcmla_lane_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.cmla.lane.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2, <vscale x 8 x i16> %op3, i32 3, i32 180) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_lane_s16'}} + return SVE_ACLE_FUNC(svcmla_lane,_s16,,)(op1, op2, op3, 3, 180); +} + +svint32_t test_svcmla_lane_s32(svint32_t op1, svint32_t op2, svint32_t op3) +{ + // CHECK-LABEL: test_svcmla_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.cmla.lane.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2, <vscale x 4 x i32> %op3, i32 0, i32 270) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_lane_s32'}} + return SVE_ACLE_FUNC(svcmla_lane,_s32,,)(op1, op2, op3, 0, 270); +} + +svint32_t test_svcmla_lane_s32_1(svint32_t op1, svint32_t op2, svint32_t op3) +{ + // CHECK-LABEL: test_svcmla_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.cmla.lane.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2, <vscale x 4 x i32> %op3, i32 1, i32 0) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_lane_s32'}} + return SVE_ACLE_FUNC(svcmla_lane,_s32,,)(op1, op2, op3, 1, 0); +} + +svuint16_t test_svcmla_lane_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) +{ + // CHECK-LABEL: test_svcmla_lane_u16 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.cmla.lane.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2, <vscale x 8 x i16> %op3, i32 0, i32 90) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_lane_u16'}} + return SVE_ACLE_FUNC(svcmla_lane,_u16,,)(op1, op2, op3, 0, 90); +} + +svuint16_t test_svcmla_lane_u16_1(svuint16_t op1, svuint16_t op2, svuint16_t op3) +{ + // CHECK-LABEL: test_svcmla_lane_u16_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.cmla.lane.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2, <vscale x 8 x i16> %op3, i32 3, i32 180) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_lane_u16'}} + return SVE_ACLE_FUNC(svcmla_lane,_u16,,)(op1, op2, op3, 3, 180); +} + +svuint32_t test_svcmla_lane_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) +{ + // CHECK-LABEL: test_svcmla_lane_u32 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.cmla.lane.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2, <vscale x 4 x i32> %op3, i32 0, i32 270) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_lane_u32'}} + return SVE_ACLE_FUNC(svcmla_lane,_u32,,)(op1, op2, op3, 0, 270); +} + +svuint32_t test_svcmla_lane_u32_1(svuint32_t op1, svuint32_t op2, svuint32_t op3) +{ + // CHECK-LABEL: test_svcmla_lane_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.cmla.lane.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2, <vscale x 4 x i32> %op3, i32 1, i32 0) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + // expected-warning@+1 {{implicit declaration of function 'svcmla_lane_u32'}} + return SVE_ACLE_FUNC(svcmla_lane,_u32,,)(op1, op2, op3, 1, 0); +} diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qcadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qcadd.c new file mode 100644 index 000000000000..028283b1e3c8 --- /dev/null +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qcadd.c @@ -0,0 +1,93 @@ +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s + +#include <arm_sve.h> + +#ifdef SVE_OVERLOADED_FORMS +// A simple used,unused... macro, long enough to represent any SVE builtin. +#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3 +#else +#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 +#endif + +svint8_t test_svqcadd_s8(svint8_t op1, svint8_t op2) +{ + // CHECK-LABEL: test_svqcadd_s8 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqcadd.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2, i32 90) + // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqcadd'}} + // expected-warning@+1 {{implicit declaration of function 'svqcadd_s8'}} + return SVE_ACLE_FUNC(svqcadd,_s8,,)(op1, op2, 90); +} + +svint8_t test_svqcadd_s8_1(svint8_t op1, svint8_t op2) +{ + // CHECK-LABEL: test_svqcadd_s8_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqcadd.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2, i32 270) + // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqcadd'}} + // expected-warning@+1 {{implicit declaration of function 'svqcadd_s8'}} + return SVE_ACLE_FUNC(svqcadd,_s8,,)(op1, op2, 270); +} + +svint16_t test_svqcadd_s16(svint16_t op1, svint16_t op2) +{ + // CHECK-LABEL: test_svqcadd_s16 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqcadd.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2, i32 90) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqcadd'}} + // expected-warning@+1 {{implicit declaration of function 'svqcadd_s16'}} + return SVE_ACLE_FUNC(svqcadd,_s16,,)(op1, op2, 90); +} + +svint16_t test_svqcadd_s16_1(svint16_t op1, svint16_t op2) +{ + // CHECK-LABEL: test_svqcadd_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqcadd.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2, i32 270) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqcadd'}} + // expected-warning@+1 {{implicit declaration of function 'svqcadd_s16'}} + return SVE_ACLE_FUNC(svqcadd,_s16,,)(op1, op2, 270); +} + +svint32_t test_svqcadd_s32(svint32_t op1, svint32_t op2) +{ + // CHECK-LABEL: test_svqcadd_s32 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqcadd.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2, i32 90) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqcadd'}} + // expected-warning@+1 {{implicit declaration of function 'svqcadd_s32'}} + return SVE_ACLE_FUNC(svqcadd,_s32,,)(op1, op2, 90); +} + +svint32_t test_svqcadd_s32_1(svint32_t op1, svint32_t op2) +{ + // CHECK-LABEL: test_svqcadd_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqcadd.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2, i32 270) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqcadd'}} + // expected-warning@+1 {{implicit declaration of function 'svqcadd_s32'}} + return SVE_ACLE_FUNC(svqcadd,_s32,,)(op1, op2, 270); +} + +svint64_t test_svqcadd_s64(svint64_t op1, svint64_t op2) +{ + // CHECK-LABEL: test_svqcadd_s64 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqcadd.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2, i32 90) + // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqcadd'}} + // expected-warning@+1 {{implicit declaration of function 'svqcadd_s64'}} + return SVE_ACLE_FUNC(svqcadd,_s64,,)(op1, op2, 90); +} + +svint64_t test_svqcadd_s64_1(svint64_t op1, svint64_t op2) +{ + // CHECK-LABEL: test_svqcadd_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqcadd.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2, i32 270) + // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqcadd'}} + // expected-warning@+1 {{implicit declaration of function 'svqcadd_s64'}} + return SVE_ACLE_FUNC(svqcadd,_s64,,)(op1, op2, 270); +} diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdcmlah.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdcmlah.c new file mode 100644 index 000000000000..33853acc600f --- /dev/null +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdcmlah.c @@ -0,0 +1,213 @@ +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s + +#include <arm_sve.h> + +#ifdef SVE_OVERLOADED_FORMS +// A simple used,unused... macro, long enough to represent any SVE builtin. +#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3 +#else +#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 +#endif + +svint8_t test_svqrdcmlah_s8(svint8_t op1, svint8_t op2, svint8_t op3) +{ + // CHECK-LABEL: test_svqrdcmlah_s8 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2, <vscale x 16 x i8> %op3, i32 0) + // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} + // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s8'}} + return SVE_ACLE_FUNC(svqrdcmlah,_s8,,)(op1, op2, op3, 0); +} + +svint8_t test_svqrdcmlah_s8_1(svint8_t op1, svint8_t op2, svint8_t op3) +{ + // CHECK-LABEL: test_svqrdcmlah_s8_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2, <vscale x 16 x i8> %op3, i32 90) + // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} + // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s8'}} + return SVE_ACLE_FUNC(svqrdcmlah,_s8,,)(op1, op2, op3, 90); +} + +svint8_t test_svqrdcmlah_s8_2(svint8_t op1, svint8_t op2, svint8_t op3) +{ + // CHECK-LABEL: test_svqrdcmlah_s8_2 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2, <vscale x 16 x i8> %op3, i32 180) + // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} + // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s8'}} + return SVE_ACLE_FUNC(svqrdcmlah,_s8,,)(op1, op2, op3, 180); +} + +svint8_t test_svqrdcmlah_s8_3(svint8_t op1, svint8_t op2, svint8_t op3) +{ + // CHECK-LABEL: test_svqrdcmlah_s8_3 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8(<vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2, <vscale x 16 x i8> %op3, i32 270) + // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} + // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s8'}} + return SVE_ACLE_FUNC(svqrdcmlah,_s8,,)(op1, op2, op3, 270); +} + +svint16_t test_svqrdcmlah_s16(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // CHECK-LABEL: test_svqrdcmlah_s16 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2, <vscale x 8 x i16> %op3, i32 0) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} + // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s16'}} + return SVE_ACLE_FUNC(svqrdcmlah,_s16,,)(op1, op2, op3, 0); +} + +svint16_t test_svqrdcmlah_s16_1(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // CHECK-LABEL: test_svqrdcmlah_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2, <vscale x 8 x i16> %op3, i32 90) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} + // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s16'}} + return SVE_ACLE_FUNC(svqrdcmlah,_s16,,)(op1, op2, op3, 90); +} + +svint16_t test_svqrdcmlah_s16_2(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // CHECK-LABEL: test_svqrdcmlah_s16_2 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2, <vscale x 8 x i16> %op3, i32 180) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} + // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s16'}} + return SVE_ACLE_FUNC(svqrdcmlah,_s16,,)(op1, op2, op3, 180); +} + +svint16_t test_svqrdcmlah_s16_3(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // CHECK-LABEL: test_svqrdcmlah_s16_3 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2, <vscale x 8 x i16> %op3, i32 270) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} + // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s16'}} + return SVE_ACLE_FUNC(svqrdcmlah,_s16,,)(op1, op2, op3, 270); +} + +svint32_t test_svqrdcmlah_s32(svint32_t op1, svint32_t op2, svint32_t op3) +{ + // CHECK-LABEL: test_svqrdcmlah_s32 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2, <vscale x 4 x i32> %op3, i32 0) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} + // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s32'}} + return SVE_ACLE_FUNC(svqrdcmlah,_s32,,)(op1, op2, op3, 0); +} + +svint32_t test_svqrdcmlah_s32_1(svint32_t op1, svint32_t op2, svint32_t op3) +{ + // CHECK-LABEL: test_svqrdcmlah_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2, <vscale x 4 x i32> %op3, i32 90) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} + // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s32'}} + return SVE_ACLE_FUNC(svqrdcmlah,_s32,,)(op1, op2, op3, 90); +} + +svint32_t test_svqrdcmlah_s32_2(svint32_t op1, svint32_t op2, svint32_t op3) +{ + // CHECK-LABEL: test_svqrdcmlah_s32_2 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2, <vscale x 4 x i32> %op3, i32 180) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} + // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s32'}} + return SVE_ACLE_FUNC(svqrdcmlah,_s32,,)(op1, op2, op3, 180); +} + +svint32_t test_svqrdcmlah_s32_3(svint32_t op1, svint32_t op2, svint32_t op3) +{ + // CHECK-LABEL: test_svqrdcmlah_s32_3 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2, <vscale x 4 x i32> %op3, i32 270) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} + // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s32'}} + return SVE_ACLE_FUNC(svqrdcmlah,_s32,,)(op1, op2, op3, 270); +} + +svint64_t test_svqrdcmlah_s64(svint64_t op1, svint64_t op2, svint64_t op3) +{ + // CHECK-LABEL: test_svqrdcmlah_s64 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2, <vscale x 2 x i64> %op3, i32 0) + // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} + // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s64'}} + return SVE_ACLE_FUNC(svqrdcmlah,_s64,,)(op1, op2, op3, 0); +} + +svint64_t test_svqrdcmlah_s64_1(svint64_t op1, svint64_t op2, svint64_t op3) +{ + // CHECK-LABEL: test_svqrdcmlah_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2, <vscale x 2 x i64> %op3, i32 90) + // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} + // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s64'}} + return SVE_ACLE_FUNC(svqrdcmlah,_s64,,)(op1, op2, op3, 90); +} + +svint64_t test_svqrdcmlah_s64_2(svint64_t op1, svint64_t op2, svint64_t op3) +{ + // CHECK-LABEL: test_svqrdcmlah_s64_2 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2, <vscale x 2 x i64> %op3, i32 180) + // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} + // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s64'}} + return SVE_ACLE_FUNC(svqrdcmlah,_s64,,)(op1, op2, op3, 180); +} + +svint64_t test_svqrdcmlah_s64_3(svint64_t op1, svint64_t op2, svint64_t op3) +{ + // CHECK-LABEL: test_svqrdcmlah_s64_3 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64(<vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2, <vscale x 2 x i64> %op3, i32 270) + // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} + // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s64'}} + return SVE_ACLE_FUNC(svqrdcmlah,_s64,,)(op1, op2, op3, 270); +} + +svint16_t test_svqrdcmlah_lane_s16(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // CHECK-LABEL: test_svqrdcmlah_lane_s16 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2, <vscale x 8 x i16> %op3, i32 0, i32 0) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah_lane'}} + // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_lane_s16'}} + return SVE_ACLE_FUNC(svqrdcmlah_lane,_s16,,)(op1, op2, op3, 0, 0); +} + +svint16_t test_svqrdcmlah_lane_s16_1(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // CHECK-LABEL: test_svqrdcmlah_lane_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv8i16(<vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2, <vscale x 8 x i16> %op3, i32 3, i32 90) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah_lane'}} + // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_lane_s16'}} + return SVE_ACLE_FUNC(svqrdcmlah_lane,_s16,,)(op1, op2, op3, 3, 90); +} + +svint32_t test_svqrdcmlah_lane_s32(svint32_t op1, svint32_t op2, svint32_t op3) +{ + // CHECK-LABEL: test_svqrdcmlah_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2, <vscale x 4 x i32> %op3, i32 0, i32 180) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah_lane'}} + // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_lane_s32'}} + return SVE_ACLE_FUNC(svqrdcmlah_lane,_s32,,)(op1, op2, op3, 0, 180); +} + +svint32_t test_svqrdcmlah_lane_s32_1(svint32_t op1, svint32_t op2, svint32_t op3) +{ + // CHECK-LABEL: test_svqrdcmlah_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv4i32(<vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2, <vscale x 4 x i32> %op3, i32 1, i32 270) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah_lane'}} + // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_lane_s32'}} + return SVE_ACLE_FUNC(svqrdcmlah_lane,_s32,,)(op1, op2, op3, 1, 270); +} diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_cadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_cadd.c new file mode 100644 index 000000000000..70e8f3192a82 --- /dev/null +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_cadd.c @@ -0,0 +1,83 @@ +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -fsyntax-only -verify %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -fsyntax-only -verify %s + +#ifdef SVE_OVERLOADED_FORMS +// A simple used,unused... macro, long enough to represent any SVE builtin. +#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3 +#else +#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 +#endif + +#include <arm_sve.h> + +svint8_t test_svcadd_s8(svint8_t op1, svint8_t op2) +{ + // expected-error@+1 {{argument should be the value 90 or 270}} + return SVE_ACLE_FUNC(svcadd,_s8,,)(op1, op2, 0); +} + +svint8_t test_svcadd_s8_1(svint8_t op1, svint8_t op2) +{ + // expected-error@+1 {{argument should be the value 90 or 270}} + return SVE_ACLE_FUNC(svcadd,_s8,,)(op1, op2, 272); +} + +svint8_t test_svcadd_s8_2(svint8_t op1, svint8_t op2) +{ + // expected-error@+1 {{argument should be the value 90 or 270}} + return SVE_ACLE_FUNC(svcadd,_s8,,)(op1, op2, 91); +} + +svint8_t test_svcadd_s8_3(svint8_t op1, svint8_t op2) +{ + // expected-error@+1 {{argument should be the value 90 or 270}} + return SVE_ACLE_FUNC(svcadd,_s8,,)(op1, op2, 180); +} + +svint8_t test_svcadd_s8_4(svint8_t op1, svint8_t op2) +{ + // expected-error@+1 {{argument should be the value 90 or 270}} + return SVE_ACLE_FUNC(svcadd,_s8,,)(op1, op2, 271); +} + +svint16_t test_svcadd_s16(svint16_t op1, svint16_t op2) +{ + // expected-error@+1 {{argument should be the value 90 or 270}} + return SVE_ACLE_FUNC(svcadd,_s16,,)(op1, op2, 0); +} + +svint32_t test_svcadd_s32(svint32_t op1, svint32_t op2) +{ + // expected-error@+1 {{argument should be the value 90 or 270}} + return SVE_ACLE_FUNC(svcadd,_s32,,)(op1, op2, 0); +} + +svint64_t test_svcadd_s64(svint64_t op1, svint64_t op2) +{ + // expected-error@+1 {{argument should be the value 90 or 270}} + return SVE_ACLE_FUNC(svcadd,_s64,,)(op1, op2, 0); +} + +svuint8_t test_svcadd_u8(svuint8_t op1, svuint8_t op2) +{ + // expected-error@+1 {{argument should be the value 90 or 270}} + return SVE_ACLE_FUNC(svcadd,_u8,,)(op1, op2, 0); +} + +svuint16_t test_svcadd_u16(svuint16_t op1, svuint16_t op2) +{ + // expected-error@+1 {{argument should be the value 90 or 270}} + return SVE_ACLE_FUNC(svcadd,_u16,,)(op1, op2, 0); +} + +svuint32_t test_svcadd_u32(svuint32_t op1, svuint32_t op2) +{ + // expected-error@+1 {{argument should be the value 90 or 270}} + return SVE_ACLE_FUNC(svcadd,_u32,,)(op1, op2, 0); +} + +svuint64_t test_svcadd_u64(svuint64_t op1, svuint64_t op2) +{ + // expected-error@+1 {{argument should be the value 90 or 270}} + return SVE_ACLE_FUNC(svcadd,_u64,,)(op1, op2, 0); +} diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_cmla.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_cmla.c new file mode 100644 index 000000000000..338e1f10f8dc --- /dev/null +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_cmla.c @@ -0,0 +1,186 @@ +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -fsyntax-only -verify %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -fsyntax-only -verify %s + +#ifdef SVE_OVERLOADED_FORMS +// A simple used,unused... macro, long enough to represent any SVE builtin. +#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3 +#else +#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 +#endif + +#include <arm_sve.h> + +svint8_t test_svcmla_s8(svint8_t op1, svint8_t op2, svint8_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svcmla,_s8,,)(op1, op2, op3, 19); +} + +svint8_t test_svcmla_s8_1(svint8_t op1, svint8_t op2, svint8_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svcmla,_s8,,)(op1, op2, op3, 1); +} + +svint8_t test_svcmla_s8_2(svint8_t op1, svint8_t op2, svint8_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svcmla,_s8,,)(op1, op2, op3, 18); +} + +svint8_t test_svcmla_s8_3(svint8_t op1, svint8_t op2, svint8_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svcmla,_s8,,)(op1, op2, op3, 91); +} + +svint8_t test_svcmla_s8_4(svint8_t op1, svint8_t op2, svint8_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svcmla,_s8,,)(op1, op2, op3, 181); +} + +svint16_t test_svcmla_s16(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svcmla,_s16,,)(op1, op2, op3, 19); +} + +svint32_t test_svcmla_s32(svint32_t op1, svint32_t op2, svint32_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svcmla,_s32,,)(op1, op2, op3, 19); +} + +svint64_t test_svcmla_s64(svint64_t op1, svint64_t op2, svint64_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svcmla,_s64,,)(op1, op2, op3, 19); +} + +svuint8_t test_svcmla_u8(svuint8_t op1, svuint8_t op2, svuint8_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svcmla,_u8,,)(op1, op2, op3, 19); +} + +svuint16_t test_svcmla_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svcmla,_u16,,)(op1, op2, op3, 19); +} + +svuint32_t test_svcmla_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svcmla,_u32,,)(op1, op2, op3, 19); +} + +svuint64_t test_svcmla_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svcmla,_u64,,)(op1, op2, op3, 19); +} + +svint16_t test_svcmla_lane_s16(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 3]}} + return SVE_ACLE_FUNC(svcmla_lane,_s16,,)(op1, op2, op3, -1, 0); +} + +svint16_t test_svcmla_lane_s16_1(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 3]}} + return SVE_ACLE_FUNC(svcmla_lane,_s16,,)(op1, op2, op3, 4, 0); +} + +svint16_t test_svcmla_lane_s16_2(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 3]}} + return SVE_ACLE_FUNC(svcmla_lane,_s16,,)(op1, op2, op3, -1, 90); +} + +svint16_t test_svcmla_lane_s16_3(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 3]}} + return SVE_ACLE_FUNC(svcmla_lane,_s16,,)(op1, op2, op3, -1, 180); +} + +svint16_t test_svcmla_lane_s16_4(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 3]}} + return SVE_ACLE_FUNC(svcmla_lane,_s16,,)(op1, op2, op3, -1, 270); +} + +svint16_t test_svcmla_lane_s16_5(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svcmla_lane,_s16,,)(op1, op2, op3, 0, 19); +} + +svint16_t test_svcmla_lane_s16_6(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svcmla_lane,_s16,,)(op1, op2, op3, 1, 19); +} + +svint16_t test_svcmla_lane_s16_7(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svcmla_lane,_s16,,)(op1, op2, op3, 2, 19); +} + +svint16_t test_svcmla_lane_s16_8(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svcmla_lane,_s16,,)(op1, op2, op3, 3, 19); +} + +svint16_t test_svcmla_lane_s16_9(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // expected-error-re@+2 {{argument value {{[0-9]+}} is outside the valid range [0, 3]}} + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svcmla_lane,_s16,,)(op1, op2, op3, 4, 19); +} + +svint32_t test_svcmla_lane_s32(svint32_t op1, svint32_t op2, svint32_t op3) +{ + // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 1]}} + return SVE_ACLE_FUNC(svcmla_lane,_s32,,)(op1, op2, op3, -1, 0); +} + +svint32_t test_svcmla_lane_s32_1(svint32_t op1, svint32_t op2, svint32_t op3) +{ + // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 1]}} + return SVE_ACLE_FUNC(svcmla_lane,_s32,,)(op1, op2, op3, 2, 0); +} + +svint32_t test_svcmla_lane_s32_2(svint32_t op1, svint32_t op2, svint32_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svcmla_lane,_s32,,)(op1, op2, op3, 1, 19); +} + +svuint16_t test_svcmla_lane_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) +{ + // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 3]}} + return SVE_ACLE_FUNC(svcmla_lane,_u16,,)(op1, op2, op3, -1, 0); +} + +svuint16_t test_svcmla_lane_u16_1(svuint16_t op1, svuint16_t op2, svuint16_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svcmla_lane,_u16,,)(op1, op2, op3, 0, 19); +} + +svuint32_t test_svcmla_lane_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) +{ + // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 1]}} + return SVE_ACLE_FUNC(svcmla_lane,_u32,,)(op1, op2, op3, -1, 0); +} + +svuint32_t test_svcmla_lane_u32_1(svuint32_t op1, svuint32_t op2, svuint32_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svcmla_lane,_u32,,)(op1, op2, op3, 0, 19); +} diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_qcadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_qcadd.c new file mode 100644 index 000000000000..adf04c992846 --- /dev/null +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_qcadd.c @@ -0,0 +1,35 @@ +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -fsyntax-only -verify %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -fsyntax-only -verify %s + +#ifdef SVE_OVERLOADED_FORMS +// A simple used,unused... macro, long enough to represent any SVE builtin. +#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3 +#else +#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 +#endif + +#include <arm_sve.h> + +svint8_t test_svqcadd_s8(svint8_t op1, svint8_t op2) +{ + // expected-error@+1 {{argument should be the value 90 or 270}} + return SVE_ACLE_FUNC(svqcadd,_s8,,)(op1, op2, 0); +} + +svint16_t test_svqcadd_s16(svint16_t op1, svint16_t op2) +{ + // expected-error@+1 {{argument should be the value 90 or 270}} + return SVE_ACLE_FUNC(svqcadd,_s16,,)(op1, op2, 91); +} + +svint32_t test_svqcadd_s32(svint32_t op1, svint32_t op2) +{ + // expected-error@+1 {{argument should be the value 90 or 270}} + return SVE_ACLE_FUNC(svqcadd,_s32,,)(op1, op2, 269); +} + +svint64_t test_svqcadd_s64(svint64_t op1, svint64_t op2) +{ + // expected-error@+1 {{argument should be the value 90 or 270}} + return SVE_ACLE_FUNC(svqcadd,_s64,,)(op1, op2, 30); +} diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_qrdcmlah.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_qrdcmlah.c new file mode 100644 index 000000000000..547da4c17ed9 --- /dev/null +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/negative/acle_sve2_qrdcmlah.c @@ -0,0 +1,113 @@ +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -fsyntax-only -verify %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -fsyntax-only -verify %s + +#ifdef SVE_OVERLOADED_FORMS +// A simple used,unused... macro, long enough to represent any SVE builtin. +#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3 +#else +#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 +#endif + +#include <arm_sve.h> + +svint8_t test_svqrdcmlah_s8(svint8_t op1, svint8_t op2, svint8_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svqrdcmlah,_s8,,)(op1, op2, op3, 19); +} + +svint8_t test_svqrdcmlah_s8_1(svint8_t op1, svint8_t op2, svint8_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svqrdcmlah,_s8,,)(op1, op2, op3, 1); +} + +svint8_t test_svqrdcmlah_s8_2(svint8_t op1, svint8_t op2, svint8_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svqrdcmlah,_s8,,)(op1, op2, op3, 18); +} + +svint8_t test_svqrdcmlah_s8_3(svint8_t op1, svint8_t op2, svint8_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svqrdcmlah,_s8,,)(op1, op2, op3, 91); +} + +svint8_t test_svqrdcmlah_s8_4(svint8_t op1, svint8_t op2, svint8_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svqrdcmlah,_s8,,)(op1, op2, op3, 181); +} + +svint16_t test_svqrdcmlah_s16(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svqrdcmlah,_s16,,)(op1, op2, op3, 19); +} + +svint32_t test_svqrdcmlah_s32(svint32_t op1, svint32_t op2, svint32_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svqrdcmlah,_s32,,)(op1, op2, op3, 19); +} + +svint64_t test_svqrdcmlah_s64(svint64_t op1, svint64_t op2, svint64_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svqrdcmlah,_s64,,)(op1, op2, op3, 19); +} + +svint16_t test_svqrdcmlah_lane_s16(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 3]}} + return SVE_ACLE_FUNC(svqrdcmlah_lane,_s16,,)(op1, op2, op3, -1, 0); +} + +svint16_t test_svqrdcmlah_lane_s16_1(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 3]}} + return SVE_ACLE_FUNC(svqrdcmlah_lane,_s16,,)(op1, op2, op3, 4, 0); +} + +svint16_t test_svqrdcmlah_lane_s16_2(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 3]}} + return SVE_ACLE_FUNC(svqrdcmlah_lane,_s16,,)(op1, op2, op3, -1, 90); +} + +svint16_t test_svqrdcmlah_lane_s16_3(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 3]}} + return SVE_ACLE_FUNC(svqrdcmlah_lane,_s16,,)(op1, op2, op3, -1, 180); +} + +svint16_t test_svqrdcmlah_lane_s16_4(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 3]}} + return SVE_ACLE_FUNC(svqrdcmlah_lane,_s16,,)(op1, op2, op3, -1, 270); +} + +svint16_t test_svqrdcmlah_lane_s16_5(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svqrdcmlah_lane,_s16,,)(op1, op2, op3, 0, 19); +} + +svint16_t test_svqrdcmlah_lane_s16_6(svint16_t op1, svint16_t op2, svint16_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svqrdcmlah_lane,_s16,,)(op1, op2, op3, 1, 19); +} + +svint32_t test_svqrdcmlah_lane_s32(svint32_t op1, svint32_t op2, svint32_t op3) +{ + // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [0, 1]}} + return SVE_ACLE_FUNC(svqrdcmlah_lane,_s32,,)(op1, op2, op3, 2, 0); +} + +svint32_t test_svqrdcmlah_lane_s32_1(svint32_t op1, svint32_t op2, svint32_t op3) +{ + // expected-error@+1 {{argument should be the value 0, 90, 180 or 270}} + return SVE_ACLE_FUNC(svqrdcmlah_lane,_s32,,)(op1, op2, op3, 0, 19); +} _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
