Author: Sander de Smalen Date: 2020-05-07T13:31:46+01:00 New Revision: 35de49655023207a888c0469b24f39fc2e5eaa8a
URL: https://github.com/llvm/llvm-project/commit/35de49655023207a888c0469b24f39fc2e5eaa8a DIFF: https://github.com/llvm/llvm-project/commit/35de49655023207a888c0469b24f39fc2e5eaa8a.diff LOG: [SveEmitter] Add builtins for svqdecp and svqincp This patch adds builtins for saturating increment/decrement by svcntp, in scalar and vector forms. Added: clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecp.c clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincp.c Modified: clang/include/clang/Basic/arm_sve.td Removed: ################################################################################ diff --git a/clang/include/clang/Basic/arm_sve.td b/clang/include/clang/Basic/arm_sve.td index c0248a83f4ea..4b43e02b3367 100644 --- a/clang/include/clang/Basic/arm_sve.td +++ b/clang/include/clang/Basic/arm_sve.td @@ -1221,6 +1221,20 @@ defm SVQINCW_U : SInst_SAT2<"svqincw", "aarch64_sve_uqincw", UnsignedWord>; defm SVQINCD_S : SInst_SAT2<"svqincd", "aarch64_sve_sqincd", SignedDoubleWord>; defm SVQINCD_U : SInst_SAT2<"svqincd", "aarch64_sve_uqincd", UnsignedDoubleWord>; +def SVQDECP_S : SInst<"svqdecp[_{d}]", "ddP", "sil", MergeNone, "aarch64_sve_sqdecp">; +def SVQDECP_U : SInst<"svqdecp[_{d}]", "ddP", "UsUiUl", MergeNone, "aarch64_sve_uqdecp">; +def SVQINCP_S : SInst<"svqincp[_{d}]", "ddP", "sil", MergeNone, "aarch64_sve_sqincp">; +def SVQINCP_U : SInst<"svqincp[_{d}]", "ddP", "UsUiUl", MergeNone, "aarch64_sve_uqincp">; + +def SVQDECP_N_S32 : SInst<"svqdecp[_n_s32]_{d}", "kkP", "PcPsPiPl", MergeNone, "aarch64_sve_sqdecp_n32">; +def SVQDECP_N_S64 : SInst<"svqdecp[_n_s64]_{d}", "llP", "PcPsPiPl", MergeNone, "aarch64_sve_sqdecp_n64">; +def SVQDECP_N_U32 : SInst<"svqdecp[_n_u32]_{d}", "mmP", "PcPsPiPl", MergeNone, "aarch64_sve_uqdecp_n32">; +def SVQDECP_N_U64 : SInst<"svqdecp[_n_u64]_{d}", "nnP", "PcPsPiPl", MergeNone, "aarch64_sve_uqdecp_n64">; +def SVQINCP_N_S32 : SInst<"svqincp[_n_s32]_{d}", "kkP", "PcPsPiPl", MergeNone, "aarch64_sve_sqincp_n32">; +def SVQINCP_N_S64 : SInst<"svqincp[_n_s64]_{d}", "llP", "PcPsPiPl", MergeNone, "aarch64_sve_sqincp_n64">; +def SVQINCP_N_U32 : SInst<"svqincp[_n_u32]_{d}", "mmP", "PcPsPiPl", MergeNone, "aarch64_sve_uqincp_n32">; +def SVQINCP_N_U64 : SInst<"svqincp[_n_u64]_{d}", "nnP", "PcPsPiPl", MergeNone, "aarch64_sve_uqincp_n64">; + //////////////////////////////////////////////////////////////////////////////// // SVE2 WhileGE/GT let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecp.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecp.c new file mode 100644 index 000000000000..14b1ebd1ff22 --- /dev/null +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecp.c @@ -0,0 +1,205 @@ +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s + +#include <arm_sve.h> + +#ifdef SVE_OVERLOADED_FORMS +// A simple used,unused... macro, long enough to represent any SVE builtin. +#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3 +#else +#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 +#endif + +int32_t test_svqdecp_n_s32_b8(int32_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqdecp_n_s32_b8 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecp.n32.nxv16i1(i32 %op, <vscale x 16 x i1> %pg) + // CHECK: ret i32 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqdecp,_n_s32,_b8,)(op, pg); +} + +int32_t test_svqdecp_n_s32_b16(int32_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqdecp_n_s32_b16 + // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecp.n32.nxv8i1(i32 %op, <vscale x 8 x i1> %[[PG]]) + // CHECK: ret i32 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqdecp,_n_s32,_b16,)(op, pg); +} + +int32_t test_svqdecp_n_s32_b32(int32_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqdecp_n_s32_b32 + // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecp.n32.nxv4i1(i32 %op, <vscale x 4 x i1> %[[PG]]) + // CHECK: ret i32 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqdecp,_n_s32,_b32,)(op, pg); +} + +int32_t test_svqdecp_n_s32_b64(int32_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqdecp_n_s32_b64 + // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecp.n32.nxv2i1(i32 %op, <vscale x 2 x i1> %[[PG]]) + // CHECK: ret i32 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqdecp,_n_s32,_b64,)(op, pg); +} + +int64_t test_svqdecp_n_s64_b8(int64_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqdecp_n_s64_b8 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqdecp.n64.nxv16i1(i64 %op, <vscale x 16 x i1> %pg) + // CHECK: ret i64 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqdecp,_n_s64,_b8,)(op, pg); +} + +int64_t test_svqdecp_n_s64_b16(int64_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqdecp_n_s64_b16 + // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqdecp.n64.nxv8i1(i64 %op, <vscale x 8 x i1> %[[PG]]) + // CHECK: ret i64 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqdecp,_n_s64,_b16,)(op, pg); +} + +int64_t test_svqdecp_n_s64_b32(int64_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqdecp_n_s64_b32 + // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqdecp.n64.nxv4i1(i64 %op, <vscale x 4 x i1> %[[PG]]) + // CHECK: ret i64 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqdecp,_n_s64,_b32,)(op, pg); +} + +int64_t test_svqdecp_n_s64_b64(int64_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqdecp_n_s64_b64 + // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqdecp.n64.nxv2i1(i64 %op, <vscale x 2 x i1> %[[PG]]) + // CHECK: ret i64 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqdecp,_n_s64,_b64,)(op, pg); +} + +uint32_t test_svqdecp_n_u32_b8(uint32_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqdecp_n_u32_b8 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqdecp.n32.nxv16i1(i32 %op, <vscale x 16 x i1> %pg) + // CHECK: ret i32 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqdecp,_n_u32,_b8,)(op, pg); +} + +uint32_t test_svqdecp_n_u32_b16(uint32_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqdecp_n_u32_b16 + // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqdecp.n32.nxv8i1(i32 %op, <vscale x 8 x i1> %[[PG]]) + // CHECK: ret i32 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqdecp,_n_u32,_b16,)(op, pg); +} + +uint32_t test_svqdecp_n_u32_b32(uint32_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqdecp_n_u32_b32 + // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqdecp.n32.nxv4i1(i32 %op, <vscale x 4 x i1> %[[PG]]) + // CHECK: ret i32 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqdecp,_n_u32,_b32,)(op, pg); +} + +uint32_t test_svqdecp_n_u32_b64(uint32_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqdecp_n_u32_b64 + // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqdecp.n32.nxv2i1(i32 %op, <vscale x 2 x i1> %[[PG]]) + // CHECK: ret i32 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqdecp,_n_u32,_b64,)(op, pg); +} + +uint64_t test_svqdecp_n_u64_b8(uint64_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqdecp_n_u64_b8 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqdecp.n64.nxv16i1(i64 %op, <vscale x 16 x i1> %pg) + // CHECK: ret i64 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqdecp,_n_u64,_b8,)(op, pg); +} + +uint64_t test_svqdecp_n_u64_b16(uint64_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqdecp_n_u64_b16 + // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqdecp.n64.nxv8i1(i64 %op, <vscale x 8 x i1> %[[PG]]) + // CHECK: ret i64 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqdecp,_n_u64,_b16,)(op, pg); +} + +uint64_t test_svqdecp_n_u64_b32(uint64_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqdecp_n_u64_b32 + // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqdecp.n64.nxv4i1(i64 %op, <vscale x 4 x i1> %[[PG]]) + // CHECK: ret i64 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqdecp,_n_u64,_b32,)(op, pg); +} + +uint64_t test_svqdecp_n_u64_b64(uint64_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqdecp_n_u64_b64 + // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqdecp.n64.nxv2i1(i64 %op, <vscale x 2 x i1> %[[PG]]) + // CHECK: ret i64 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqdecp,_n_u64,_b64,)(op, pg); +} + +svint16_t test_svqdecp_s16(svint16_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqdecp_s16 + // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqdecp.nxv8i16(<vscale x 8 x i16> %op, <vscale x 8 x i1> %[[PG]]) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqdecp,_s16,,)(op, pg); +} + +svint32_t test_svqdecp_s32(svint32_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqdecp_s32 + // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqdecp.nxv4i32(<vscale x 4 x i32> %op, <vscale x 4 x i1> %[[PG]]) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqdecp,_s32,,)(op, pg); +} + +svint64_t test_svqdecp_s64(svint64_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqdecp_s64 + // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqdecp.nxv2i64(<vscale x 2 x i64> %op, <vscale x 2 x i1> %[[PG]]) + // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqdecp,_s64,,)(op, pg); +} + +svuint16_t test_svqdecp_u16(svuint16_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqdecp_u16 + // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqdecp.nxv8i16(<vscale x 8 x i16> %op, <vscale x 8 x i1> %[[PG]]) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqdecp,_u16,,)(op, pg); +} + +svuint32_t test_svqdecp_u32(svuint32_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqdecp_u32 + // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqdecp.nxv4i32(<vscale x 4 x i32> %op, <vscale x 4 x i1> %[[PG]]) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqdecp,_u32,,)(op, pg); +} + +svuint64_t test_svqdecp_u64(svuint64_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqdecp_u64 + // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqdecp.nxv2i64(<vscale x 2 x i64> %op, <vscale x 2 x i1> %[[PG]]) + // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqdecp,_u64,,)(op, pg); +} diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincp.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincp.c new file mode 100644 index 000000000000..704e8405e2c6 --- /dev/null +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincp.c @@ -0,0 +1,205 @@ +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s + +#include <arm_sve.h> + +#ifdef SVE_OVERLOADED_FORMS +// A simple used,unused... macro, long enough to represent any SVE builtin. +#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3 +#else +#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 +#endif + +int32_t test_svqincp_n_s32_b8(int32_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqincp_n_s32_b8 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincp.n32.nxv16i1(i32 %op, <vscale x 16 x i1> %pg) + // CHECK: ret i32 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqincp,_n_s32,_b8,)(op, pg); +} + +int32_t test_svqincp_n_s32_b16(int32_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqincp_n_s32_b16 + // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincp.n32.nxv8i1(i32 %op, <vscale x 8 x i1> %[[PG]]) + // CHECK: ret i32 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqincp,_n_s32,_b16,)(op, pg); +} + +int32_t test_svqincp_n_s32_b32(int32_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqincp_n_s32_b32 + // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincp.n32.nxv4i1(i32 %op, <vscale x 4 x i1> %[[PG]]) + // CHECK: ret i32 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqincp,_n_s32,_b32,)(op, pg); +} + +int32_t test_svqincp_n_s32_b64(int32_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqincp_n_s32_b64 + // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincp.n32.nxv2i1(i32 %op, <vscale x 2 x i1> %[[PG]]) + // CHECK: ret i32 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqincp,_n_s32,_b64,)(op, pg); +} + +int64_t test_svqincp_n_s64_b8(int64_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqincp_n_s64_b8 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqincp.n64.nxv16i1(i64 %op, <vscale x 16 x i1> %pg) + // CHECK: ret i64 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqincp,_n_s64,_b8,)(op, pg); +} + +int64_t test_svqincp_n_s64_b16(int64_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqincp_n_s64_b16 + // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqincp.n64.nxv8i1(i64 %op, <vscale x 8 x i1> %[[PG]]) + // CHECK: ret i64 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqincp,_n_s64,_b16,)(op, pg); +} + +int64_t test_svqincp_n_s64_b32(int64_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqincp_n_s64_b32 + // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqincp.n64.nxv4i1(i64 %op, <vscale x 4 x i1> %[[PG]]) + // CHECK: ret i64 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqincp,_n_s64,_b32,)(op, pg); +} + +int64_t test_svqincp_n_s64_b64(int64_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqincp_n_s64_b64 + // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqincp.n64.nxv2i1(i64 %op, <vscale x 2 x i1> %[[PG]]) + // CHECK: ret i64 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqincp,_n_s64,_b64,)(op, pg); +} + +uint32_t test_svqincp_n_u32_b8(uint32_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqincp_n_u32_b8 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqincp.n32.nxv16i1(i32 %op, <vscale x 16 x i1> %pg) + // CHECK: ret i32 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqincp,_n_u32,_b8,)(op, pg); +} + +uint32_t test_svqincp_n_u32_b16(uint32_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqincp_n_u32_b16 + // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqincp.n32.nxv8i1(i32 %op, <vscale x 8 x i1> %[[PG]]) + // CHECK: ret i32 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqincp,_n_u32,_b16,)(op, pg); +} + +uint32_t test_svqincp_n_u32_b32(uint32_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqincp_n_u32_b32 + // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqincp.n32.nxv4i1(i32 %op, <vscale x 4 x i1> %[[PG]]) + // CHECK: ret i32 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqincp,_n_u32,_b32,)(op, pg); +} + +uint32_t test_svqincp_n_u32_b64(uint32_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqincp_n_u32_b64 + // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqincp.n32.nxv2i1(i32 %op, <vscale x 2 x i1> %[[PG]]) + // CHECK: ret i32 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqincp,_n_u32,_b64,)(op, pg); +} + +uint64_t test_svqincp_n_u64_b8(uint64_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqincp_n_u64_b8 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqincp.n64.nxv16i1(i64 %op, <vscale x 16 x i1> %pg) + // CHECK: ret i64 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqincp,_n_u64,_b8,)(op, pg); +} + +uint64_t test_svqincp_n_u64_b16(uint64_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqincp_n_u64_b16 + // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqincp.n64.nxv8i1(i64 %op, <vscale x 8 x i1> %[[PG]]) + // CHECK: ret i64 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqincp,_n_u64,_b16,)(op, pg); +} + +uint64_t test_svqincp_n_u64_b32(uint64_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqincp_n_u64_b32 + // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqincp.n64.nxv4i1(i64 %op, <vscale x 4 x i1> %[[PG]]) + // CHECK: ret i64 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqincp,_n_u64,_b32,)(op, pg); +} + +uint64_t test_svqincp_n_u64_b64(uint64_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqincp_n_u64_b64 + // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqincp.n64.nxv2i1(i64 %op, <vscale x 2 x i1> %[[PG]]) + // CHECK: ret i64 %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqincp,_n_u64,_b64,)(op, pg); +} + +svint16_t test_svqincp_s16(svint16_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqincp_s16 + // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqincp.nxv8i16(<vscale x 8 x i16> %op, <vscale x 8 x i1> %[[PG]]) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqincp,_s16,,)(op, pg); +} + +svint32_t test_svqincp_s32(svint32_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqincp_s32 + // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqincp.nxv4i32(<vscale x 4 x i32> %op, <vscale x 4 x i1> %[[PG]]) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqincp,_s32,,)(op, pg); +} + +svint64_t test_svqincp_s64(svint64_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqincp_s64 + // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqincp.nxv2i64(<vscale x 2 x i64> %op, <vscale x 2 x i1> %[[PG]]) + // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqincp,_s64,,)(op, pg); +} + +svuint16_t test_svqincp_u16(svuint16_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqincp_u16 + // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqincp.nxv8i16(<vscale x 8 x i16> %op, <vscale x 8 x i1> %[[PG]]) + // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqincp,_u16,,)(op, pg); +} + +svuint32_t test_svqincp_u32(svuint32_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqincp_u32 + // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqincp.nxv4i32(<vscale x 4 x i32> %op, <vscale x 4 x i1> %[[PG]]) + // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqincp,_u32,,)(op, pg); +} + +svuint64_t test_svqincp_u64(svuint64_t op, svbool_t pg) +{ + // CHECK-LABEL: test_svqincp_u64 + // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg) + // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqincp.nxv2i64(<vscale x 2 x i64> %op, <vscale x 2 x i1> %[[PG]]) + // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]] + return SVE_ACLE_FUNC(svqincp,_u64,,)(op, pg); +} _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
