Author: mzuckerm Date: Tue Mar 1 11:49:03 2016 New Revision: 262355 URL: http://llvm.org/viewvc/llvm-project?rev=262355&view=rev Log: [CLANG][AVX512][BUILTIN] Adding PSRL{DI|QI}{128|256|512} builtin
Differential Revision: http://reviews.llvm.org/D17714 Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def cfe/trunk/lib/Headers/avx512fintrin.h cfe/trunk/lib/Headers/avx512vlintrin.h cfe/trunk/test/CodeGen/avx512f-builtins.c cfe/trunk/test/CodeGen/avx512vl-builtins.c Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=262355&r1=262354&r2=262355&view=diff ============================================================================== --- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original) +++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Tue Mar 1 11:49:03 2016 @@ -1668,6 +1668,16 @@ TARGET_BUILTIN(__builtin_ia32_psrlv2di_m TARGET_BUILTIN(__builtin_ia32_psrlv4di_mask, "V4LLiV4LLiV4LLiV4LLiUc","","avx512vl") TARGET_BUILTIN(__builtin_ia32_psrlv4si_mask, "V4iV4iV4iV4iUc","","avx512vl") TARGET_BUILTIN(__builtin_ia32_psrlv8si_mask, "V8iV8iV8iV8iUc","","avx512vl") +TARGET_BUILTIN(__builtin_ia32_psrldi512_mask, "V16iV16iiV16iUs","","avx512f") +TARGET_BUILTIN(__builtin_ia32_psrlqi512_mask, "V8LLiV8LLiiV8LLiUc","","avx512f") +TARGET_BUILTIN(__builtin_ia32_psrld128_mask, "V4iV4iV4iV4iUc","","avx512vl") +TARGET_BUILTIN(__builtin_ia32_psrld256_mask, "V8iV8iV4iV8iUc","","avx512vl") +TARGET_BUILTIN(__builtin_ia32_psrldi128_mask, "V4iV4iIiV4iUc","","avx512vl") +TARGET_BUILTIN(__builtin_ia32_psrldi256_mask, "V8iV8iIiV8iUc","","avx512vl") +TARGET_BUILTIN(__builtin_ia32_psrlq128_mask, "V2LLiV2LLiV2LLiV2LLiUc","","avx512vl") +TARGET_BUILTIN(__builtin_ia32_psrlq256_mask, "V4LLiV4LLiV2LLiV4LLiUc","","avx512vl") +TARGET_BUILTIN(__builtin_ia32_psrlqi128_mask, "V2LLiV2LLiIiV2LLiUc","","avx512vl") +TARGET_BUILTIN(__builtin_ia32_psrlqi256_mask, "V4LLiV4LLiIiV4LLiUc","","avx512vl") #undef BUILTIN #undef TARGET_BUILTIN Modified: cfe/trunk/lib/Headers/avx512fintrin.h URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512fintrin.h?rev=262355&r1=262354&r2=262355&view=diff ============================================================================== --- cfe/trunk/lib/Headers/avx512fintrin.h (original) +++ cfe/trunk/lib/Headers/avx512fintrin.h Tue Mar 1 11:49:03 2016 @@ -3561,6 +3561,47 @@ __builtin_ia32_psllqi512_mask ((__v8di)( }) + +#define _mm512_srli_epi32( __A, __B) __extension__ ({ \ +__builtin_ia32_psrldi512_mask ((__v16si)( __A),( __B),\ + (__v16si)\ + _mm512_setzero_si512 (),\ + (__mmask16) -1);\ +}) + +#define _mm512_mask_srli_epi32( __W, __U, __A, __B) __extension__ ({ \ +__builtin_ia32_psrldi512_mask ((__v16si)( __A),( __B),\ + (__v16si)( __W),\ + (__mmask16)( __U));\ +}) + +#define _mm512_maskz_srli_epi32( __U, __A, __B) __extension__ ({ \ +__builtin_ia32_psrldi512_mask ((__v16si)( __A),( __B),\ + (__v16si)\ + _mm512_setzero_si512 (),\ + (__mmask16)( __U));\ +}) + +#define _mm512_srli_epi64( __A, __B) __extension__ ({ \ +__builtin_ia32_psrlqi512_mask ((__v8di)( __A),( __B),\ + (__v8di)\ + _mm512_setzero_si512 (),\ + (__mmask8) -1);\ +}) + +#define _mm512_mask_srli_epi64( __W, __U, __A, __B) __extension__ ({ \ +__builtin_ia32_psrlqi512_mask ((__v8di)( __A),( __B),\ + (__v8di)( __W),\ + (__mmask8)( __U));\ +}) + +#define _mm512_maskz_srli_epi64( __U, __A, __B) __extension__ ({ \ +__builtin_ia32_psrlqi512_mask ((__v8di)( __A),( __B),\ + (__v8di)\ + _mm512_setzero_si512 (),\ + (__mmask8)( __U));\ +}) + #undef __DEFAULT_FN_ATTRS #endif // __AVX512FINTRIN_H Modified: cfe/trunk/lib/Headers/avx512vlintrin.h URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512vlintrin.h?rev=262355&r1=262354&r2=262355&view=diff ============================================================================== --- cfe/trunk/lib/Headers/avx512vlintrin.h (original) +++ cfe/trunk/lib/Headers/avx512vlintrin.h Tue Mar 1 11:49:03 2016 @@ -5638,6 +5638,140 @@ _mm256_maskz_srlv_epi32 (__mmask8 __U, _ (__mmask8) __U); } + + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_mask_srl_epi32 (__m128i __W, __mmask8 __U, __m128i __A, + __m128i __B) +{ + return (__m128i) __builtin_ia32_psrld128_mask ((__v4si) __A, + (__v4si) __B, + (__v4si) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_maskz_srl_epi32 (__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i) __builtin_ia32_psrld128_mask ((__v4si) __A, + (__v4si) __B, + (__v4si) + _mm_setzero_si128 (), + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS +_mm256_mask_srl_epi32 (__m256i __W, __mmask8 __U, __m256i __A, + __m128i __B) +{ + return (__m256i) __builtin_ia32_psrld256_mask ((__v8si) __A, + (__v4si) __B, + (__v8si) __W, + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS +_mm256_maskz_srl_epi32 (__mmask8 __U, __m256i __A, __m128i __B) +{ + return (__m256i) __builtin_ia32_psrld256_mask ((__v8si) __A, + (__v4si) __B, + (__v8si) + _mm256_setzero_si256 (), + (__mmask8) __U); +} + +#define _mm_mask_srli_epi32( __W, __U, __A, __imm) __extension__ ({ \ +__builtin_ia32_psrldi128_mask ((__v4si)( __A),( __imm),\ + (__v4si)( __W),\ + (__mmask8)( __U));\ +}) + +#define _mm_maskz_srli_epi32( __U, __A, __imm) __extension__ ({ \ +__builtin_ia32_psrldi128_mask ((__v4si)( __A),( __imm),\ + (__v4si)\ + _mm_setzero_si128 (),\ + (__mmask8)( __U));\ +}) + +#define _mm256_mask_srli_epi32( __W, __U, __A, __imm) __extension__ ({ \ +__builtin_ia32_psrldi256_mask ((__v8si)( __A),( __imm),\ + (__v8si)( __W),\ + (__mmask8)( __U));\ +}) + +#define _mm256_maskz_srli_epi32( __U, __A, __imm) __extension__ ({ \ +__builtin_ia32_psrldi256_mask ((__v8si)( __A),( __imm),\ + (__v8si)\ + _mm256_setzero_si256 (),\ + (__mmask8)( __U));\ +}) + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_mask_srl_epi64 (__m128i __W, __mmask8 __U, __m128i __A, + __m128i __B) +{ + return (__m128i) __builtin_ia32_psrlq128_mask ((__v2di) __A, + (__v2di) __B, + (__v2di) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_maskz_srl_epi64 (__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i) __builtin_ia32_psrlq128_mask ((__v2di) __A, + (__v2di) __B, + (__v2di) + _mm_setzero_di (), + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS +_mm256_mask_srl_epi64 (__m256i __W, __mmask8 __U, __m256i __A, + __m128i __B) +{ + return (__m256i) __builtin_ia32_psrlq256_mask ((__v4di) __A, + (__v2di) __B, + (__v4di) __W, + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS +_mm256_maskz_srl_epi64 (__mmask8 __U, __m256i __A, __m128i __B) +{ + return (__m256i) __builtin_ia32_psrlq256_mask ((__v4di) __A, + (__v2di) __B, + (__v4di) + _mm256_setzero_si256 (), + (__mmask8) __U); +} + +#define _mm_mask_srli_epi64( __W, __U, __A, __imm) __extension__ ({ \ +__builtin_ia32_psrlqi128_mask ((__v2di)( __A),( __imm),\ + (__v2di)( __W),\ + (__mmask8)( __U));\ +}) + +#define _mm_maskz_srli_epi64( __U, __A, __imm) __extension__ ({ \ +__builtin_ia32_psrlqi128_mask ((__v2di)( __A),( __imm),\ + (__v2di)\ + _mm_setzero_si128 (),\ + (__mmask8)( __U));\ +}) + +#define _mm256_mask_srli_epi64( __W, __U, __A, __imm) __extension__ ({ \ +__builtin_ia32_psrlqi256_mask ((__v4di)( __A),( __imm),\ + (__v4di)( __W),\ + (__mmask8)( __U));\ +}) + +#define _mm256_maskz_srli_epi64( __U, __A, __imm) __extension__ ({ \ +__builtin_ia32_psrlqi256_mask ((__v4di)( __A),( __imm),\ + (__v4di)\ + _mm256_setzero_si256 (),\ + (__mmask8)( __U));\ +}) + #undef __DEFAULT_FN_ATTRS #undef __DEFAULT_FN_ATTRS_BOTH Modified: cfe/trunk/test/CodeGen/avx512f-builtins.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512f-builtins.c?rev=262355&r1=262354&r2=262355&view=diff ============================================================================== --- cfe/trunk/test/CodeGen/avx512f-builtins.c (original) +++ cfe/trunk/test/CodeGen/avx512f-builtins.c Tue Mar 1 11:49:03 2016 @@ -2262,4 +2262,39 @@ __m512i test_mm512_maskz_slli_epi64(__mm return _mm512_maskz_slli_epi64(__U, __A, 5); } +__m512i test_mm512_srli_epi32(__m512i __A) { + // CHECK-LABEL: @test_mm512_srli_epi32 + // CHECK: @llvm.x86.avx512.mask.psrl.di.512 + return _mm512_srli_epi32(__A, 5); +} + +__m512i test_mm512_mask_srli_epi32(__m512i __W, __mmask16 __U, __m512i __A) { + // CHECK-LABEL: @test_mm512_mask_srli_epi32 + // CHECK: @llvm.x86.avx512.mask.psrl.di.512 + return _mm512_mask_srli_epi32(__W, __U, __A, 5); +} + +__m512i test_mm512_maskz_srli_epi32(__mmask16 __U, __m512i __A) { + // CHECK-LABEL: @test_mm512_maskz_srli_epi32 + // CHECK: @llvm.x86.avx512.mask.psrl.di.512 + return _mm512_maskz_srli_epi32(__U, __A, 5); +} + +__m512i test_mm512_srli_epi64(__m512i __A) { + // CHECK-LABEL: @test_mm512_srli_epi64 + // CHECK: @llvm.x86.avx512.mask.psrl.qi.512 + return _mm512_srli_epi64(__A, 5); +} + +__m512i test_mm512_mask_srli_epi64(__m512i __W, __mmask8 __U, __m512i __A) { + // CHECK-LABEL: @test_mm512_mask_srli_epi64 + // CHECK: @llvm.x86.avx512.mask.psrl.qi.512 + return _mm512_mask_srli_epi64(__W, __U, __A, 5); +} + +__m512i test_mm512_maskz_srli_epi64(__mmask8 __U, __m512i __A) { + // CHECK-LABEL: @test_mm512_maskz_srli_epi64 + // CHECK: @llvm.x86.avx512.mask.psrl.qi.512 + return _mm512_maskz_srli_epi64(__U, __A, 5); +} Modified: cfe/trunk/test/CodeGen/avx512vl-builtins.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512vl-builtins.c?rev=262355&r1=262354&r2=262355&view=diff ============================================================================== --- cfe/trunk/test/CodeGen/avx512vl-builtins.c (original) +++ cfe/trunk/test/CodeGen/avx512vl-builtins.c Tue Mar 1 11:49:03 2016 @@ -3780,3 +3780,99 @@ __m256i test_mm256_maskz_srlv_epi32(__mm return _mm256_maskz_srlv_epi32(__U, __X, __Y); } +__m128i test_mm_mask_srl_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { + // CHECK-LABEL: @test_mm_mask_srl_epi32 + // CHECK: @llvm.x86.avx512.mask.psrl.d.128 + return _mm_mask_srl_epi32(__W, __U, __A, __B); +} + +__m128i test_mm_maskz_srl_epi32(__mmask8 __U, __m128i __A, __m128i __B) { + // CHECK-LABEL: @test_mm_maskz_srl_epi32 + // CHECK: @llvm.x86.avx512.mask.psrl.d.128 + return _mm_maskz_srl_epi32(__U, __A, __B); +} + +__m256i test_mm256_mask_srl_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) { + // CHECK-LABEL: @test_mm256_mask_srl_epi32 + // CHECK: @llvm.x86.avx512.mask.psrl.d.256 + return _mm256_mask_srl_epi32(__W, __U, __A, __B); +} + +__m256i test_mm256_maskz_srl_epi32(__mmask8 __U, __m256i __A, __m128i __B) { + // CHECK-LABEL: @test_mm256_maskz_srl_epi32 + // CHECK: @llvm.x86.avx512.mask.psrl.d.256 + return _mm256_maskz_srl_epi32(__U, __A, __B); +} + +__m128i test_mm_mask_srli_epi32(__m128i __W, __mmask8 __U, __m128i __A) { + // CHECK-LABEL: @test_mm_mask_srli_epi32 + // CHECK: @llvm.x86.avx512.mask.psrl.di.128 + return _mm_mask_srli_epi32(__W, __U, __A, 5); +} + +__m128i test_mm_maskz_srli_epi32(__mmask8 __U, __m128i __A) { + // CHECK-LABEL: @test_mm_maskz_srli_epi32 + // CHECK: @llvm.x86.avx512.mask.psrl.di.128 + return _mm_maskz_srli_epi32(__U, __A, 5); +} + +__m256i test_mm256_mask_srli_epi32(__m256i __W, __mmask8 __U, __m256i __A) { + // CHECK-LABEL: @test_mm256_mask_srli_epi32 + // CHECK: @llvm.x86.avx512.mask.psrl.di.256 + return _mm256_mask_srli_epi32(__W, __U, __A, 5); +} + +__m256i test_mm256_maskz_srli_epi32(__mmask8 __U, __m256i __A) { + // CHECK-LABEL: @test_mm256_maskz_srli_epi32 + // CHECK: @llvm.x86.avx512.mask.psrl.di.256 + return _mm256_maskz_srli_epi32(__U, __A, 5); +} + +__m128i test_mm_mask_srl_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { + // CHECK-LABEL: @test_mm_mask_srl_epi64 + // CHECK: @llvm.x86.avx512.mask.psrl.q.128 + return _mm_mask_srl_epi64(__W, __U, __A, __B); +} + +__m128i test_mm_maskz_srl_epi64(__mmask8 __U, __m128i __A, __m128i __B) { + // CHECK-LABEL: @test_mm_maskz_srl_epi64 + // CHECK: @llvm.x86.avx512.mask.psrl.q.128 + return _mm_maskz_srl_epi64(__U, __A, __B); +} + +__m256i test_mm256_mask_srl_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) { + // CHECK-LABEL: @test_mm256_mask_srl_epi64 + // CHECK: @llvm.x86.avx512.mask.psrl.q.256 + return _mm256_mask_srl_epi64(__W, __U, __A, __B); +} + +__m256i test_mm256_maskz_srl_epi64(__mmask8 __U, __m256i __A, __m128i __B) { + // CHECK-LABEL: @test_mm256_maskz_srl_epi64 + // CHECK: @llvm.x86.avx512.mask.psrl.q.256 + return _mm256_maskz_srl_epi64(__U, __A, __B); +} + +__m128i test_mm_mask_srli_epi64(__m128i __W, __mmask8 __U, __m128i __A) { + // CHECK-LABEL: @test_mm_mask_srli_epi64 + // CHECK: @llvm.x86.avx512.mask.psrl.qi.128 + return _mm_mask_srli_epi64(__W, __U, __A, 5); +} + +__m128i test_mm_maskz_srli_epi64(__mmask8 __U, __m128i __A) { + // CHECK-LABEL: @test_mm_maskz_srli_epi64 + // CHECK: @llvm.x86.avx512.mask.psrl.qi.128 + return _mm_maskz_srli_epi64(__U, __A, 5); +} + +__m256i test_mm256_mask_srli_epi64(__m256i __W, __mmask8 __U, __m256i __A) { + // CHECK-LABEL: @test_mm256_mask_srli_epi64 + // CHECK: @llvm.x86.avx512.mask.psrl.qi.256 + return _mm256_mask_srli_epi64(__W, __U, __A, 5); +} + +__m256i test_mm256_maskz_srli_epi64(__mmask8 __U, __m256i __A) { + // CHECK-LABEL: @test_mm256_maskz_srli_epi64 + // CHECK: @llvm.x86.avx512.mask.psrl.qi.256 + return _mm256_maskz_srli_epi64(__U, __A, 5); +} + _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
