dschuff added a comment.

I think the expectation is that if you use an intrinsics header that has an 
intrinsic for each machine instruction, that each intrinsic call should result 
in exactly one machine instruction with the same arguments you passed to it. If 
the vector operation is created some other way (e.g. autovectorization or even 
__builtin_shufflevector) then I agree that there doesn't necessarily have to be 
that expectation.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D66983/new/

https://reviews.llvm.org/D66983



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