Author: simpal01 Date: Fri Jul 26 08:05:19 2019 New Revision: 367119 URL: http://llvm.org/viewvc/llvm-project?rev=367119&view=rev Log: [ARM] Set default alignment to 64bits
The maximum alignment used by ARM arch is 64bits, not 128. This could cause overaligned memory access for 128 bit neon vector that have unpredictable behaviour. This fixes: https://bugs.llvm.org/show_bug.cgi?id=42668 Patch by: Diogo Sampaio(diogo.samp...@arm.com) Differential Revision: https://reviews.llvm.org/D65000 Change-Id: I5a62b766491f15dd51e4cfe6625929db897f67e3 Added: cfe/trunk/test/CodeGen/ARM/ cfe/trunk/test/CodeGen/ARM/exception-alignment.cpp Modified: cfe/trunk/lib/Basic/Targets/ARM.cpp cfe/trunk/test/SemaCXX/warn-overaligned-type-thrown.cpp Modified: cfe/trunk/lib/Basic/Targets/ARM.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/ARM.cpp?rev=367119&r1=367118&r2=367119&view=diff ============================================================================== --- cfe/trunk/lib/Basic/Targets/ARM.cpp (original) +++ cfe/trunk/lib/Basic/Targets/ARM.cpp Fri Jul 26 08:05:19 2019 @@ -309,8 +309,9 @@ ARMTargetInfo::ARMTargetInfo(const llvm: setAtomic(); // Maximum alignment for ARM NEON data types should be 64-bits (AAPCS) + // as well the default alignment if (IsAAPCS && (Triple.getEnvironment() != llvm::Triple::Android)) - MaxVectorAlign = 64; + DefaultAlignForAttributeAligned = MaxVectorAlign = 64; // Do force alignment of members that follow zero length bitfields. If // the alignment of the zero-length bitfield is greater than the member Added: cfe/trunk/test/CodeGen/ARM/exception-alignment.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/ARM/exception-alignment.cpp?rev=367119&view=auto ============================================================================== --- cfe/trunk/test/CodeGen/ARM/exception-alignment.cpp (added) +++ cfe/trunk/test/CodeGen/ARM/exception-alignment.cpp Fri Jul 26 08:05:19 2019 @@ -0,0 +1,19 @@ +// Bug: https://bugs.llvm.org/show_bug.cgi?id=42668 +// REQUIRES: arm-registered-target +// RUN: %clang --target=arm-arm-none-eabi -march=armv8-a -S -emit-llvm -Os -o - %s | FileCheck --check-prefixes=CHECK,A8 %s +// RUN: %clang --target=arm-linux-androideabi -march=armv8-a -S -emit-llvm -Os -o - %s | FileCheck --check-prefixes=CHECK,A16 %s +// CHECK: [[E:%[A-z0-9]+]] = tail call i8* @__cxa_allocate_exception +// CHECK-NEXT: [[BC:%[A-z0-9]+]] = bitcast i8* [[E]] to <2 x i64>* +// A8-NEXT: store <2 x i64> <i64 1, i64 2>, <2 x i64>* [[BC]], align 8 +// A16-NEXT: store <2 x i64> <i64 1, i64 2>, <2 x i64>* [[BC]], align 16 +#include <arm_neon.h> + +int main(void) { + try { + throw vld1q_u64(((const uint64_t[2]){1, 2})); + } catch (uint64x2_t exc) { + return 0; + } + return 1; +} + Modified: cfe/trunk/test/SemaCXX/warn-overaligned-type-thrown.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/SemaCXX/warn-overaligned-type-thrown.cpp?rev=367119&r1=367118&r2=367119&view=diff ============================================================================== --- cfe/trunk/test/SemaCXX/warn-overaligned-type-thrown.cpp (original) +++ cfe/trunk/test/SemaCXX/warn-overaligned-type-thrown.cpp Fri Jul 26 08:05:19 2019 @@ -2,11 +2,12 @@ // RUN: %clang_cc1 -triple arm64-apple-ios10 -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions -DUNDERALIGNED %s // RUN: %clang_cc1 -triple arm64-apple-tvos10 -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions -DUNDERALIGNED %s // RUN: %clang_cc1 -triple arm64-apple-watchos4 -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions -DUNDERALIGNED %s +// RUN: %clang_cc1 -triple arm-linux-gnueabi -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions -DUNDERALIGNED %s // RUN: %clang_cc1 -triple x86_64-apple-macosx10.14 -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions %s // RUN: %clang_cc1 -triple arm64-apple-ios12 -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions %s // RUN: %clang_cc1 -triple arm64-apple-tvos12 -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions %s // RUN: %clang_cc1 -triple arm64-apple-watchos5 -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions %s -// RUN: %clang_cc1 -triple arm-linux-gnueabi -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions %s +// RUN: %clang_cc1 -triple arm-linux-androideabi -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions %s // RUN: %clang_cc1 -triple aarch64-linux-gnueabi -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions %s // RUN: %clang_cc1 -triple mipsel-linux-gnu -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions %s // RUN: %clang_cc1 -triple mips64el-linux-gnu -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions %s _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
