yaxunl created this revision.
yaxunl added reviewers: b-sumner, rampitec, arsenm.
Herald added subscribers: t-tye, tpr, dstuttard, nhaehnle, wdng, jvesely,
kzhuravl.
https://reviews.llvm.org/D61112
Files:
lib/Basic/Targets/AMDGPU.cpp
test/CodeGenCXX/amdgpu-float16.cpp
Index: test/CodeGenCXX/amdgpu-float16.cpp
===================================================================
--- /dev/null
+++ test/CodeGenCXX/amdgpu-float16.cpp
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx701 -S -o - %s |
FileCheck %s -check-prefix=NOF16
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx803 -S -o - %s |
FileCheck %s
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx900 -S -o - %s |
FileCheck %s
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx906 -S -o - %s |
FileCheck %s
+void f() {
+ _Float16 x, y, z;
+ // CHECK: v_add_f16_e64
+ // NOF16: v_add_f32_e64
+ z = x + y;
+ // CHECK: v_sub_f16_e64
+ // NOF16: v_sub_f32_e64
+ z = x - y;
+ // CHECK: v_mul_f16_e64
+ // NOF16: v_mul_f32_e64
+ z = x * y;
+ // CHECK: v_div_fixup_f16
+ // NOF16: v_div_fixup_f32
+ z = x / y;
+}
Index: lib/Basic/Targets/AMDGPU.cpp
===================================================================
--- lib/Basic/Targets/AMDGPU.cpp
+++ lib/Basic/Targets/AMDGPU.cpp
@@ -252,6 +252,9 @@
!isAMDGCN(Triple));
UseAddrSpaceMapMangling = true;
+ HasLegalHalfType = true;
+ HasFloat16 = true;
+
// Set pointer width and alignment for target address space 0.
PointerWidth = PointerAlign = DataLayout->getPointerSizeInBits();
if (getMaxPointerWidth() == 64) {
Index: test/CodeGenCXX/amdgpu-float16.cpp
===================================================================
--- /dev/null
+++ test/CodeGenCXX/amdgpu-float16.cpp
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx701 -S -o - %s | FileCheck %s -check-prefix=NOF16
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx803 -S -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx900 -S -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx906 -S -o - %s | FileCheck %s
+void f() {
+ _Float16 x, y, z;
+ // CHECK: v_add_f16_e64
+ // NOF16: v_add_f32_e64
+ z = x + y;
+ // CHECK: v_sub_f16_e64
+ // NOF16: v_sub_f32_e64
+ z = x - y;
+ // CHECK: v_mul_f16_e64
+ // NOF16: v_mul_f32_e64
+ z = x * y;
+ // CHECK: v_div_fixup_f16
+ // NOF16: v_div_fixup_f32
+ z = x / y;
+}
Index: lib/Basic/Targets/AMDGPU.cpp
===================================================================
--- lib/Basic/Targets/AMDGPU.cpp
+++ lib/Basic/Targets/AMDGPU.cpp
@@ -252,6 +252,9 @@
!isAMDGCN(Triple));
UseAddrSpaceMapMangling = true;
+ HasLegalHalfType = true;
+ HasFloat16 = true;
+
// Set pointer width and alignment for target address space 0.
PointerWidth = PointerAlign = DataLayout->getPointerSizeInBits();
if (getMaxPointerWidth() == 64) {
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
