Author: ctopper
Date: Mon Apr 15 11:39:36 2019
New Revision: 358435
URL: http://llvm.org/viewvc/llvm-project?rev=358435&view=rev
Log:
[X86] Improve avx512-kconstraints-att_inline_asm.c to not be easily defeated by
deadcode elimination. Improve CHECK lines to check IR types used. NFC
I plan to use this as the basis for backend IR test cases. We currently crash
hard for using 32 or 64 bit mask registers without avx512bw.
Modified:
cfe/trunk/test/CodeGen/avx512-kconstraints-att_inline_asm.c
Modified: cfe/trunk/test/CodeGen/avx512-kconstraints-att_inline_asm.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512-kconstraints-att_inline_asm.c?rev=358435&r1=358434&r2=358435&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/avx512-kconstraints-att_inline_asm.c (original)
+++ cfe/trunk/test/CodeGen/avx512-kconstraints-att_inline_asm.c Mon Apr 15
11:39:36 2019
@@ -1,59 +1,77 @@
-// RUN: %clang_cc1 %s -O0 -triple=x86_64-apple-darwin -target-cpu
skylake-avx512 -emit-llvm -o - -Wall -Werror |opt -instnamer -S |FileCheck %s
+// RUN: %clang_cc1 %s -O0 -ffreestanding -triple=x86_64-apple-darwin
-target-cpu skylake-avx512 -emit-llvm -o - -Wall -Werror |opt -instnamer -S
|FileCheck %s
// This test checks validity of att\gcc style inline assmebly for avx512 k and
Yk constraints.
// Also checks mask register allows flexible type (size <= 64 bit)
-void mask_Yk_i8(char msk){
-//CHECK: vpaddb\09 %xmm1, %xmm0, %xmm1 {$0}\09
- asm ("vpaddb\t %%xmm1, %%xmm0, %%xmm1 %{%0%}\t"
- : //output
- : "Yk" (msk)); //inputs
-}
-
-void mask_Yk_i16(short msk){
-//CHECK: vpaddb\09 %xmm1, %xmm0, %xmm1 {$0}\09
- asm ("vpaddb\t %%xmm1, %%xmm0, %%xmm1 %{%0%}\t"
- : //output
- : "Yk" (msk)); //inputs
-}
-
-void mask_Yk_i32(int msk){
-//CHECK: vpaddb\09 %xmm1, %xmm0, %xmm1 {$0}\09
- asm ("vpaddb\t %%xmm1, %%xmm0, %%xmm1 %{%0%}\t"
- : //output
- : "Yk" (msk)); //inputs
-}
+#include <x86intrin.h>
-void mask_Yk_i64(long long msk){
-//CHECK: vpaddb\09 %xmm1, %xmm0, %xmm1 {$0}\09
- asm ("vpaddb\t %%xmm1, %%xmm0, %%xmm1 %{%0%}\t"
- : //output
- : "Yk" (msk)); //inputs
-}
-
-void k_wise_op_i8(char msk_dst,char msk_src1,char msk_src2){
-//CHECK: kandw\09$2, $1, $0
- asm ("kandw\t%2, %1, %0"
+__m512i mask_Yk_i8(char msk, __m512i x, __m512i y){
+// CHECK: <8 x i64> asm "vpaddq\09$3, $2, $0 {$1}",
"=x,^Yk,x,x,~{dirflag},~{fpsr},~{flags}"(i8 %{{.*}}, <8 x i64> %{{.*}}, <8 x
i64> %{{.*}})
+ __m512i dst;
+ asm ("vpaddq\t%3, %2, %0 %{%1%}"
+ : "=x" (dst) //output
+ : "Yk" (msk), "x" (x), "x" (y)); //inputs
+ return dst;
+}
+
+__m512i mask_Yk_i16(short msk, __m512i x, __m512i y){
+// CHECK: <8 x i64> asm "vpaddd\09$3, $2, $0 {$1}",
"=x,^Yk,x,x,~{dirflag},~{fpsr},~{flags}"(i16 %{{.*}}, <8 x i64> %{{.*}}, <8 x
i64> %{{.*}})
+ __m512i dst;
+ asm ("vpaddd\t%3, %2, %0 %{%1%}"
+ : "=x" (dst) //output
+ : "Yk" (msk), "x" (x), "x" (y)); //inputs
+ return dst;
+}
+
+__m512i mask_Yk_i32(int msk, __m512i x, __m512i y){
+// CHECK: <8 x i64> asm "vpaddw\09$3, $2, $0 {$1}",
"=x,^Yk,x,x,~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}}, <8 x i64> %{{.*}}, <8 x
i64> %{{.*}})
+ __m512i dst;
+ asm ("vpaddw\t%3, %2, %0 %{%1%}"
+ : "=x" (dst) //output
+ : "Yk" (msk), "x" (x), "x" (y)); //inputs
+ return dst;
+}
+
+__m512i mask_Yk_i64(long long msk, __m512i x, __m512i y){
+// CHECK: <8 x i64> asm "vpaddb\09$3, $2, $0 {$1}",
"=x,^Yk,x,x,~{dirflag},~{fpsr},~{flags}"(i64 %{{.*}}, <8 x i64> %{{.*}}, <8 x
i64> %{{.*}})
+ __m512i dst;
+ asm ("vpaddb\t%3, %2, %0 %{%1%}"
+ : "=x" (dst) //output
+ : "Yk" (msk), "x" (x), "x" (y)); //inputs
+ return dst;
+}
+
+char k_wise_op_i8(char msk_src1,char msk_src2){
+//CHECK: i8 asm "kandb\09$2, $1, $0", "=k,k,k,~{dirflag},~{fpsr},~{flags}"(i8
%{{.*}}, i8 %{{.*}})
+ char msk_dst;
+ asm ("kandb\t%2, %1, %0"
: "=k" (msk_dst)
: "k" (msk_src1), "k" (msk_src2));
+ return msk_dst;
}
-void k_wise_op_i16(short msk_dst, short msk_src1, short msk_src2){
-//CHECK: kandw\09$2, $1, $0
+short k_wise_op_i16(short msk_src1, short msk_src2){
+//CHECK: i16 asm "kandw\09$2, $1, $0",
"=k,k,k,~{dirflag},~{fpsr},~{flags}"(i16 %{{.*}}, i16 %{{.*}})
+ short msk_dst;
asm ("kandw\t%2, %1, %0"
: "=k" (msk_dst)
: "k" (msk_src1), "k" (msk_src2));
+ return msk_dst;
}
-void k_wise_op_i32(int msk_dst, int msk_src1, int msk_src2){
-//CHECK: kandw\09$2, $1, $0
- asm ("kandw\t%2, %1, %0"
+int k_wise_op_i32(int msk_src1, int msk_src2){
+//CHECK: i32 asm "kandd\09$2, $1, $0",
"=k,k,k,~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}}, i32 %{{.*}})
+ int msk_dst;
+ asm ("kandd\t%2, %1, %0"
: "=k" (msk_dst)
: "k" (msk_src1), "k" (msk_src2));
+ return msk_dst;
}
-void k_wise_op_i64(long long msk_dst, long long msk_src1, long long msk_src2){
-//CHECK: kandw\09$2, $1, $0
- asm ("kandw\t%2, %1, %0"
+long long k_wise_op_i64(long long msk_src1, long long msk_src2){
+//CHECK: i64 asm "kandq\09$2, $1, $0",
"=k,k,k,~{dirflag},~{fpsr},~{flags}"(i64 %{{.*}}, i64 %{{.*}})
+ long long msk_dst;
+ asm ("kandq\t%2, %1, %0"
: "=k" (msk_dst)
: "k" (msk_src1), "k" (msk_src2));
+ return msk_dst;
}
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