Author: dnsampaio Date: Fri Apr 12 03:43:48 2019 New Revision: 358276 URL: http://llvm.org/viewvc/llvm-project?rev=358276&view=rev Log: [Aarch64] Add v8.2-a half precision element extract intrinsics
Summary: Implements the intrinsics define on the ACLE to extract half precision fp scalar elements from float16x4_t and float16x8_t vector types. a.k.a: vduph_lane_f16 vduph_laneq_f16 Reviewers: pablooliveira, olista01, LukeGeeson, DavidSpickett Reviewed By: DavidSpickett Subscribers: DavidSpickett, javed.absar, kristof.beyls, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D60272 Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp cfe/trunk/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGBuiltin.cpp?rev=358276&r1=358275&r2=358276&view=diff ============================================================================== --- cfe/trunk/lib/CodeGen/CGBuiltin.cpp (original) +++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp Fri Apr 12 03:43:48 2019 @@ -7847,6 +7847,14 @@ Value *CodeGenFunction::EmitAArch64Built : Intrinsic::aarch64_neon_sqsub; return EmitNeonCall(CGM.getIntrinsic(AccInt, Int64Ty), Ops, "vqdmlXl"); } + case NEON::BI__builtin_neon_vduph_lane_f16: { + return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), + "vget_lane"); + } + case NEON::BI__builtin_neon_vduph_laneq_f16: { + return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)), + "vgetq_lane"); + } } llvm::VectorType *VTy = GetNeonType(this, Type); Modified: cfe/trunk/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c?rev=358276&r1=358275&r2=358276&view=diff ============================================================================== --- cfe/trunk/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c (original) +++ cfe/trunk/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c Fri Apr 12 03:43:48 2019 @@ -1618,3 +1618,16 @@ float16x8_t test_vtrn2q_f16(float16x8_t return vtrn2q_f16(a, b); } +// CHECK-LABEL: @test_vduph_laneq_f16( +// CHECK: [[V:%.*]] = extractelement <8 x half> [[V2:%.*]], i32 7 +// CHECK-NEXT: ret half [[V]] +float16_t test_vduph_laneq_f16(float16x8_t vec) { + return vduph_laneq_f16(vec, 7); +} + +// CHECK-LABEL: @test_vduph_lane_f16( +// CHECK: [[V:%.*]] = extractelement <4 x half> [[V2:%.*]], i32 3 +// CHECK-NEXT: ret half [[V]] +float16_t test_vduph_lane_f16(float16x4_t vec) { + return vduph_lane_f16(vec, 3); +} _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
