aemerson created this revision.
aemerson added reviewers: kristof.beyls, t.p.northover, olista01.
aemerson added a project: clang.
Herald added subscribers: arphaman, javed.absar.
Some intrinsics like saturating operations may set flags, so if the scalar arg
is inserted into an undef vector, the undef elements may trigger unwanted side
effects. Using zero should be safer than undef.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D59615
Files:
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/aarch64-neon-intrinsics.c
clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c
clang/test/CodeGen/aarch64-v8.1a-neon-intrinsics.c
Index: clang/test/CodeGen/aarch64-v8.1a-neon-intrinsics.c
===================================================================
--- clang/test/CodeGen/aarch64-v8.1a-neon-intrinsics.c
+++ clang/test/CodeGen/aarch64-v8.1a-neon-intrinsics.c
@@ -39,12 +39,12 @@
// CHECK-LABEL: test_vqrdmlahh_s16
int16_t test_vqrdmlahh_s16(int16_t a, int16_t b, int16_t c) {
-// CHECK: [[insb:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
-// CHECK: [[insc:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
+// CHECK: [[insb:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
+// CHECK: [[insc:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
// CHECK: [[mul:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrdmulh.v4i16(<4 x i16> [[insb]], <4 x i16> [[insc]])
// CHECK: extractelement <4 x i16> [[mul]], i64 0
-// CHECK: [[insa:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
-// CHECK: [[insmul:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
+// CHECK: [[insa:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
+// CHECK: [[insmul:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
// CHECK: [[add:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqadd.v4i16(<4 x i16> [[insa]], <4 x i16> [[insmul]])
// CHECK: extractelement <4 x i16> [[add]], i64 0
return vqrdmlahh_s16(a, b, c);
@@ -60,12 +60,12 @@
// CHECK-LABEL: test_vqrdmlahh_lane_s16
int16_t test_vqrdmlahh_lane_s16(int16_t a, int16_t b, int16x4_t c) {
// CHECK: extractelement <4 x i16> {{%.*}}, i32 3
-// CHECK: [[insb:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
-// CHECK: [[insc:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
+// CHECK: [[insb:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
+// CHECK: [[insc:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
// CHECK: [[mul:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrdmulh.v4i16(<4 x i16> [[insb]], <4 x i16> [[insc]])
// CHECK: extractelement <4 x i16> [[mul]], i64 0
-// CHECK: [[insa:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
-// CHECK: [[insmul:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
+// CHECK: [[insa:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
+// CHECK: [[insmul:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
// CHECK: [[add:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqadd.v4i16(<4 x i16> [[insa]], <4 x i16> [[insmul]])
// CHECK: extractelement <4 x i16> [[add]], i64 0
return vqrdmlahh_lane_s16(a, b, c, 3);
@@ -82,12 +82,12 @@
// CHECK-LABEL: test_vqrdmlahh_laneq_s16
int16_t test_vqrdmlahh_laneq_s16(int16_t a, int16_t b, int16x8_t c) {
// CHECK: extractelement <8 x i16> {{%.*}}, i32 7
-// CHECK: [[insb:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
-// CHECK: [[insc:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
+// CHECK: [[insb:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
+// CHECK: [[insc:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
// CHECK: [[mul:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrdmulh.v4i16(<4 x i16> [[insb]], <4 x i16> [[insc]])
// CHECK: extractelement <4 x i16> [[mul]], i64 0
-// CHECK: [[insa:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
-// CHECK: [[insmul:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
+// CHECK: [[insa:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
+// CHECK: [[insmul:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
// CHECK: [[add:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqadd.v4i16(<4 x i16> [[insa]], <4 x i16> [[insmul]])
// CHECK: extractelement <4 x i16> [[add]], i64 0
return vqrdmlahh_laneq_s16(a, b, c, 7);
@@ -135,12 +135,12 @@
// CHECK-LABEL: test_vqrdmlshh_s16
int16_t test_vqrdmlshh_s16(int16_t a, int16_t b, int16_t c) {
-// CHECK: [[insb:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
-// CHECK: [[insc:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
+// CHECK: [[insb:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
+// CHECK: [[insc:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
// CHECK: [[mul:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrdmulh.v4i16(<4 x i16> [[insb]], <4 x i16> [[insc]])
// CHECK: extractelement <4 x i16> [[mul]], i64 0
-// CHECK: [[insa:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
-// CHECK: [[insmul:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
+// CHECK: [[insa:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
+// CHECK: [[insmul:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
// CHECK: [[sub:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqsub.v4i16(<4 x i16> [[insa]], <4 x i16> [[insmul]])
// CHECK: extractelement <4 x i16> [[sub]], i64 0
return vqrdmlshh_s16(a, b, c);
@@ -156,12 +156,12 @@
// CHECK-LABEL: test_vqrdmlshh_lane_s16
int16_t test_vqrdmlshh_lane_s16(int16_t a, int16_t b, int16x4_t c) {
// CHECK: extractelement <4 x i16> {{%.*}}, i32 3
-// CHECK: [[insb:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
-// CHECK: [[insc:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
+// CHECK: [[insb:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
+// CHECK: [[insc:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
// CHECK: [[mul:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrdmulh.v4i16(<4 x i16> [[insb]], <4 x i16> [[insc]])
// CHECK: extractelement <4 x i16> [[mul]], i64 0
-// CHECK: [[insa:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
-// CHECK: [[insmul:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
+// CHECK: [[insa:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
+// CHECK: [[insmul:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
// CHECK: [[sub:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqsub.v4i16(<4 x i16> [[insa]], <4 x i16> [[insmul]])
// CHECK: extractelement <4 x i16> [[sub]], i64 0
return vqrdmlshh_lane_s16(a, b, c, 3);
@@ -178,12 +178,12 @@
// CHECK-LABEL: test_vqrdmlshh_laneq_s16
int16_t test_vqrdmlshh_laneq_s16(int16_t a, int16_t b, int16x8_t c) {
// CHECK: extractelement <8 x i16> {{%.*}}, i32 7
-// CHECK: [[insb:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
-// CHECK: [[insc:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
+// CHECK: [[insb:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
+// CHECK: [[insc:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
// CHECK: [[mul:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrdmulh.v4i16(<4 x i16> [[insb]], <4 x i16> [[insc]])
// CHECK: extractelement <4 x i16> [[mul]], i64 0
-// CHECK: [[insa:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
-// CHECK: [[insmul:%.*]] = insertelement <4 x i16> undef, i16 {{%.*}}, i64 0
+// CHECK: [[insa:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
+// CHECK: [[insmul:%.*]] = insertelement <4 x i16> zeroinitializer, i16 {{%.*}}, i64 0
// CHECK: [[sub:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqsub.v4i16(<4 x i16> [[insa]], <4 x i16> [[insmul]])
// CHECK: extractelement <4 x i16> [[sub]], i64 0
return vqrdmlshh_laneq_s16(a, b, c, 7);
Index: clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c
===================================================================
--- clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c
+++ clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c
@@ -250,8 +250,8 @@
// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %b to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> [[TMP1]], i32 3
-// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
-// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGET_LANE]], i64 0
+// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %a, i64 0
+// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> zeroinitializer, i16 [[VGET_LANE]], i64 0
// CHECK: [[VQDMULLH_S16_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> [[TMP2]], <4 x i16> [[TMP3]])
// CHECK: [[TMP4:%.*]] = extractelement <4 x i32> [[VQDMULLH_S16_I]], i64 0
// CHECK: ret i32 [[TMP4]]
@@ -273,8 +273,8 @@
// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %b to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> [[TMP1]], i32 7
-// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
-// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGETQ_LANE]], i64 0
+// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %a, i64 0
+// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> zeroinitializer, i16 [[VGETQ_LANE]], i64 0
// CHECK: [[VQDMULLH_S16_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> [[TMP2]], <4 x i16> [[TMP3]])
// CHECK: [[TMP4:%.*]] = extractelement <4 x i32> [[VQDMULLH_S16_I]], i64 0
// CHECK: ret i32 [[TMP4]]
@@ -296,8 +296,8 @@
// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %b to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> [[TMP1]], i32 3
-// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
-// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGET_LANE]], i64 0
+// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %a, i64 0
+// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> zeroinitializer, i16 [[VGET_LANE]], i64 0
// CHECK: [[VQDMULHH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqdmulh.v4i16(<4 x i16> [[TMP2]], <4 x i16> [[TMP3]])
// CHECK: [[TMP4:%.*]] = extractelement <4 x i16> [[VQDMULHH_S16_I]], i64 0
// CHECK: ret i16 [[TMP4]]
@@ -320,8 +320,8 @@
// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %b to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> [[TMP1]], i32 7
-// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
-// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGETQ_LANE]], i64 0
+// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %a, i64 0
+// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> zeroinitializer, i16 [[VGETQ_LANE]], i64 0
// CHECK: [[VQDMULHH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqdmulh.v4i16(<4 x i16> [[TMP2]], <4 x i16> [[TMP3]])
// CHECK: [[TMP4:%.*]] = extractelement <4 x i16> [[VQDMULHH_S16_I]], i64 0
// CHECK: ret i16 [[TMP4]]
@@ -344,8 +344,8 @@
// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %b to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> [[TMP1]], i32 3
-// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
-// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGET_LANE]], i64 0
+// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %a, i64 0
+// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> zeroinitializer, i16 [[VGET_LANE]], i64 0
// CHECK: [[VQRDMULHH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrdmulh.v4i16(<4 x i16> [[TMP2]], <4 x i16> [[TMP3]])
// CHECK: [[TMP4:%.*]] = extractelement <4 x i16> [[VQRDMULHH_S16_I]], i64 0
// CHECK: ret i16 [[TMP4]]
@@ -368,8 +368,8 @@
// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %b to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> [[TMP1]], i32 7
-// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
-// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGETQ_LANE]], i64 0
+// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %a, i64 0
+// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> zeroinitializer, i16 [[VGETQ_LANE]], i64 0
// CHECK: [[VQRDMULHH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrdmulh.v4i16(<4 x i16> [[TMP2]], <4 x i16> [[TMP3]])
// CHECK: [[TMP4:%.*]] = extractelement <4 x i16> [[VQRDMULHH_S16_I]], i64 0
// CHECK: ret i16 [[TMP4]]
Index: clang/test/CodeGen/aarch64-neon-intrinsics.c
===================================================================
--- clang/test/CodeGen/aarch64-neon-intrinsics.c
+++ clang/test/CodeGen/aarch64-neon-intrinsics.c
@@ -8403,8 +8403,8 @@
}
// CHECK-LABEL: @test_vqaddb_s8(
-// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> undef, i8 %a, i64 0
-// CHECK: [[TMP1:%.*]] = insertelement <8 x i8> undef, i8 %b, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %a, i64 0
+// CHECK: [[TMP1:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %b, i64 0
// CHECK: [[VQADDB_S8_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqadd.v8i8(<8 x i8> [[TMP0]], <8 x i8> [[TMP1]])
// CHECK: [[TMP2:%.*]] = extractelement <8 x i8> [[VQADDB_S8_I]], i64 0
// CHECK: ret i8 [[TMP2]]
@@ -8413,8 +8413,8 @@
}
// CHECK-LABEL: @test_vqaddh_s16(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
-// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %a, i64 0
+// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %b, i64 0
// CHECK: [[VQADDH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqadd.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])
// CHECK: [[TMP2:%.*]] = extractelement <4 x i16> [[VQADDH_S16_I]], i64 0
// CHECK: ret i16 [[TMP2]]
@@ -8437,8 +8437,8 @@
}
// CHECK-LABEL: @test_vqaddb_u8(
-// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> undef, i8 %a, i64 0
-// CHECK: [[TMP1:%.*]] = insertelement <8 x i8> undef, i8 %b, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %a, i64 0
+// CHECK: [[TMP1:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %b, i64 0
// CHECK: [[VQADDB_U8_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqadd.v8i8(<8 x i8> [[TMP0]], <8 x i8> [[TMP1]])
// CHECK: [[TMP2:%.*]] = extractelement <8 x i8> [[VQADDB_U8_I]], i64 0
// CHECK: ret i8 [[TMP2]]
@@ -8447,8 +8447,8 @@
}
// CHECK-LABEL: @test_vqaddh_u16(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
-// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %a, i64 0
+// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %b, i64 0
// CHECK: [[VQADDH_U16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqadd.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])
// CHECK: [[TMP2:%.*]] = extractelement <4 x i16> [[VQADDH_U16_I]], i64 0
// CHECK: ret i16 [[TMP2]]
@@ -8471,8 +8471,8 @@
}
// CHECK-LABEL: @test_vqsubb_s8(
-// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> undef, i8 %a, i64 0
-// CHECK: [[TMP1:%.*]] = insertelement <8 x i8> undef, i8 %b, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %a, i64 0
+// CHECK: [[TMP1:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %b, i64 0
// CHECK: [[VQSUBB_S8_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqsub.v8i8(<8 x i8> [[TMP0]], <8 x i8> [[TMP1]])
// CHECK: [[TMP2:%.*]] = extractelement <8 x i8> [[VQSUBB_S8_I]], i64 0
// CHECK: ret i8 [[TMP2]]
@@ -8481,8 +8481,8 @@
}
// CHECK-LABEL: @test_vqsubh_s16(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
-// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %a, i64 0
+// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %b, i64 0
// CHECK: [[VQSUBH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqsub.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])
// CHECK: [[TMP2:%.*]] = extractelement <4 x i16> [[VQSUBH_S16_I]], i64 0
// CHECK: ret i16 [[TMP2]]
@@ -8505,8 +8505,8 @@
}
// CHECK-LABEL: @test_vqsubb_u8(
-// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> undef, i8 %a, i64 0
-// CHECK: [[TMP1:%.*]] = insertelement <8 x i8> undef, i8 %b, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %a, i64 0
+// CHECK: [[TMP1:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %b, i64 0
// CHECK: [[VQSUBB_U8_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqsub.v8i8(<8 x i8> [[TMP0]], <8 x i8> [[TMP1]])
// CHECK: [[TMP2:%.*]] = extractelement <8 x i8> [[VQSUBB_U8_I]], i64 0
// CHECK: ret i8 [[TMP2]]
@@ -8515,8 +8515,8 @@
}
// CHECK-LABEL: @test_vqsubh_u16(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
-// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %a, i64 0
+// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %b, i64 0
// CHECK: [[VQSUBH_U16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqsub.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])
// CHECK: [[TMP2:%.*]] = extractelement <4 x i16> [[VQSUBH_U16_I]], i64 0
// CHECK: ret i16 [[TMP2]]
@@ -8553,8 +8553,8 @@
}
// CHECK-LABEL: @test_vqshlb_s8(
-// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> undef, i8 %a, i64 0
-// CHECK: [[TMP1:%.*]] = insertelement <8 x i8> undef, i8 %b, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %a, i64 0
+// CHECK: [[TMP1:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %b, i64 0
// CHECK: [[VQSHLB_S8_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqshl.v8i8(<8 x i8> [[TMP0]], <8 x i8> [[TMP1]])
// CHECK: [[TMP2:%.*]] = extractelement <8 x i8> [[VQSHLB_S8_I]], i64 0
// CHECK: ret i8 [[TMP2]]
@@ -8563,8 +8563,8 @@
}
// CHECK-LABEL: @test_vqshlh_s16(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
-// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %a, i64 0
+// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %b, i64 0
// CHECK: [[VQSHLH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqshl.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])
// CHECK: [[TMP2:%.*]] = extractelement <4 x i16> [[VQSHLH_S16_I]], i64 0
// CHECK: ret i16 [[TMP2]]
@@ -8587,8 +8587,8 @@
}
// CHECK-LABEL: @test_vqshlb_u8(
-// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> undef, i8 %a, i64 0
-// CHECK: [[TMP1:%.*]] = insertelement <8 x i8> undef, i8 %b, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %a, i64 0
+// CHECK: [[TMP1:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %b, i64 0
// CHECK: [[VQSHLB_U8_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqshl.v8i8(<8 x i8> [[TMP0]], <8 x i8> [[TMP1]])
// CHECK: [[TMP2:%.*]] = extractelement <8 x i8> [[VQSHLB_U8_I]], i64 0
// CHECK: ret i8 [[TMP2]]
@@ -8597,8 +8597,8 @@
}
// CHECK-LABEL: @test_vqshlh_u16(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
-// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %a, i64 0
+// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %b, i64 0
// CHECK: [[VQSHLH_U16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqshl.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])
// CHECK: [[TMP2:%.*]] = extractelement <4 x i16> [[VQSHLH_U16_I]], i64 0
// CHECK: ret i16 [[TMP2]]
@@ -8635,8 +8635,8 @@
}
// CHECK-LABEL: @test_vqrshlb_s8(
-// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> undef, i8 %a, i64 0
-// CHECK: [[TMP1:%.*]] = insertelement <8 x i8> undef, i8 %b, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %a, i64 0
+// CHECK: [[TMP1:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %b, i64 0
// CHECK: [[VQRSHLB_S8_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqrshl.v8i8(<8 x i8> [[TMP0]], <8 x i8> [[TMP1]])
// CHECK: [[TMP2:%.*]] = extractelement <8 x i8> [[VQRSHLB_S8_I]], i64 0
// CHECK: ret i8 [[TMP2]]
@@ -8645,8 +8645,8 @@
}
// CHECK-LABEL: @test_vqrshlh_s16(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
-// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %a, i64 0
+// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %b, i64 0
// CHECK: [[VQRSHLH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrshl.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])
// CHECK: [[TMP2:%.*]] = extractelement <4 x i16> [[VQRSHLH_S16_I]], i64 0
// CHECK: ret i16 [[TMP2]]
@@ -8669,8 +8669,8 @@
}
// CHECK-LABEL: @test_vqrshlb_u8(
-// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> undef, i8 %a, i64 0
-// CHECK: [[TMP1:%.*]] = insertelement <8 x i8> undef, i8 %b, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %a, i64 0
+// CHECK: [[TMP1:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %b, i64 0
// CHECK: [[VQRSHLB_U8_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqrshl.v8i8(<8 x i8> [[TMP0]], <8 x i8> [[TMP1]])
// CHECK: [[TMP2:%.*]] = extractelement <8 x i8> [[VQRSHLB_U8_I]], i64 0
// CHECK: ret i8 [[TMP2]]
@@ -8679,8 +8679,8 @@
}
// CHECK-LABEL: @test_vqrshlh_u16(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
-// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %a, i64 0
+// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %b, i64 0
// CHECK: [[VQRSHLH_U16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqrshl.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])
// CHECK: [[TMP2:%.*]] = extractelement <4 x i16> [[VQRSHLH_U16_I]], i64 0
// CHECK: ret i16 [[TMP2]]
@@ -8795,8 +8795,8 @@
}
// CHECK-LABEL: @test_vqdmulhh_s16(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
-// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %a, i64 0
+// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %b, i64 0
// CHECK: [[VQDMULHH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqdmulh.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])
// CHECK: [[TMP2:%.*]] = extractelement <4 x i16> [[VQDMULHH_S16_I]], i64 0
// CHECK: ret i16 [[TMP2]]
@@ -8812,8 +8812,8 @@
}
// CHECK-LABEL: @test_vqrdmulhh_s16(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
-// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %a, i64 0
+// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %b, i64 0
// CHECK: [[VQRDMULHH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrdmulh.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])
// CHECK: [[TMP2:%.*]] = extractelement <4 x i16> [[VQRDMULHH_S16_I]], i64 0
// CHECK: ret i16 [[TMP2]]
@@ -13803,7 +13803,7 @@
}
// CHECK-LABEL: @test_vqabsb_s8(
-// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> undef, i8 %a, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %a, i64 0
// CHECK: [[VQABSB_S8_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqabs.v8i8(<8 x i8> [[TMP0]])
// CHECK: [[TMP1:%.*]] = extractelement <8 x i8> [[VQABSB_S8_I]], i64 0
// CHECK: ret i8 [[TMP1]]
@@ -13812,7 +13812,7 @@
}
// CHECK-LABEL: @test_vqabsh_s16(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %a, i64 0
// CHECK: [[VQABSH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqabs.v4i16(<4 x i16> [[TMP0]])
// CHECK: [[TMP1:%.*]] = extractelement <4 x i16> [[VQABSH_S16_I]], i64 0
// CHECK: ret i16 [[TMP1]]
@@ -13842,7 +13842,7 @@
}
// CHECK-LABEL: @test_vqnegb_s8(
-// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> undef, i8 %a, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %a, i64 0
// CHECK: [[VQNEGB_S8_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqneg.v8i8(<8 x i8> [[TMP0]])
// CHECK: [[TMP1:%.*]] = extractelement <8 x i8> [[VQNEGB_S8_I]], i64 0
// CHECK: ret i8 [[TMP1]]
@@ -13851,7 +13851,7 @@
}
// CHECK-LABEL: @test_vqnegh_s16(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %a, i64 0
// CHECK: [[VQNEGH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqneg.v4i16(<4 x i16> [[TMP0]])
// CHECK: [[TMP1:%.*]] = extractelement <4 x i16> [[VQNEGH_S16_I]], i64 0
// CHECK: ret i16 [[TMP1]]
@@ -13874,8 +13874,8 @@
}
// CHECK-LABEL: @test_vuqaddb_s8(
-// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> undef, i8 %a, i64 0
-// CHECK: [[TMP1:%.*]] = insertelement <8 x i8> undef, i8 %b, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %a, i64 0
+// CHECK: [[TMP1:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %b, i64 0
// CHECK: [[VUQADDB_S8_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.suqadd.v8i8(<8 x i8> [[TMP0]], <8 x i8> [[TMP1]])
// CHECK: [[TMP2:%.*]] = extractelement <8 x i8> [[VUQADDB_S8_I]], i64 0
// CHECK: ret i8 [[TMP2]]
@@ -13884,8 +13884,8 @@
}
// CHECK-LABEL: @test_vuqaddh_s16(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
-// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %a, i64 0
+// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %b, i64 0
// CHECK: [[VUQADDH_S16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.suqadd.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])
// CHECK: [[TMP2:%.*]] = extractelement <4 x i16> [[VUQADDH_S16_I]], i64 0
// CHECK: ret i16 [[TMP2]]
@@ -13908,8 +13908,8 @@
}
// CHECK-LABEL: @test_vsqaddb_u8(
-// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> undef, i8 %a, i64 0
-// CHECK: [[TMP1:%.*]] = insertelement <8 x i8> undef, i8 %b, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %a, i64 0
+// CHECK: [[TMP1:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %b, i64 0
// CHECK: [[VSQADDB_U8_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.usqadd.v8i8(<8 x i8> [[TMP0]], <8 x i8> [[TMP1]])
// CHECK: [[TMP2:%.*]] = extractelement <8 x i8> [[VSQADDB_U8_I]], i64 0
// CHECK: ret i8 [[TMP2]]
@@ -13918,8 +13918,8 @@
}
// CHECK-LABEL: @test_vsqaddh_u16(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
-// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %a, i64 0
+// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %b, i64 0
// CHECK: [[VSQADDH_U16_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.usqadd.v4i16(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])
// CHECK: [[TMP2:%.*]] = extractelement <4 x i16> [[VSQADDH_U16_I]], i64 0
// CHECK: ret i16 [[TMP2]]
@@ -13980,8 +13980,8 @@
}
// CHECK-LABEL: @test_vqdmullh_s16(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
-// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %a, i64 0
+// CHECK: [[TMP1:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %b, i64 0
// CHECK: [[VQDMULLH_S16_I:%.*]] = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> [[TMP0]], <4 x i16> [[TMP1]])
// CHECK: [[TMP2:%.*]] = extractelement <4 x i32> [[VQDMULLH_S16_I]], i64 0
// CHECK: ret i32 [[TMP2]]
@@ -13997,7 +13997,7 @@
}
// CHECK-LABEL: @test_vqmovunh_s16(
-// CHECK: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 %a, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <8 x i16> zeroinitializer, i16 %a, i64 0
// CHECK: [[VQMOVUNH_S16_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqxtun.v8i8(<8 x i16> [[TMP0]])
// CHECK: [[TMP1:%.*]] = extractelement <8 x i8> [[VQMOVUNH_S16_I]], i64 0
// CHECK: ret i8 [[TMP1]]
@@ -14006,7 +14006,7 @@
}
// CHECK-LABEL: @test_vqmovuns_s32(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 %a, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i32> zeroinitializer, i32 %a, i64 0
// CHECK: [[VQMOVUNS_S32_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqxtun.v4i16(<4 x i32> [[TMP0]])
// CHECK: [[TMP1:%.*]] = extractelement <4 x i16> [[VQMOVUNS_S32_I]], i64 0
// CHECK: ret i16 [[TMP1]]
@@ -14022,7 +14022,7 @@
}
// CHECK-LABEL: @test_vqmovnh_s16(
-// CHECK: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 %a, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <8 x i16> zeroinitializer, i16 %a, i64 0
// CHECK: [[VQMOVNH_S16_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqxtn.v8i8(<8 x i16> [[TMP0]])
// CHECK: [[TMP1:%.*]] = extractelement <8 x i8> [[VQMOVNH_S16_I]], i64 0
// CHECK: ret i8 [[TMP1]]
@@ -14031,7 +14031,7 @@
}
// CHECK-LABEL: @test_vqmovns_s32(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 %a, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i32> zeroinitializer, i32 %a, i64 0
// CHECK: [[VQMOVNS_S32_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqxtn.v4i16(<4 x i32> [[TMP0]])
// CHECK: [[TMP1:%.*]] = extractelement <4 x i16> [[VQMOVNS_S32_I]], i64 0
// CHECK: ret i16 [[TMP1]]
@@ -14047,7 +14047,7 @@
}
// CHECK-LABEL: @test_vqmovnh_u16(
-// CHECK: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 %a, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <8 x i16> zeroinitializer, i16 %a, i64 0
// CHECK: [[VQMOVNH_U16_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqxtn.v8i8(<8 x i16> [[TMP0]])
// CHECK: [[TMP1:%.*]] = extractelement <8 x i8> [[VQMOVNH_U16_I]], i64 0
// CHECK: ret i8 [[TMP1]]
@@ -14056,7 +14056,7 @@
}
// CHECK-LABEL: @test_vqmovns_u32(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 %a, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i32> zeroinitializer, i32 %a, i64 0
// CHECK: [[VQMOVNS_U32_I:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqxtn.v4i16(<4 x i32> [[TMP0]])
// CHECK: [[TMP1:%.*]] = extractelement <4 x i16> [[VQMOVNS_U32_I]], i64 0
// CHECK: ret i16 [[TMP1]]
@@ -14476,8 +14476,8 @@
}
// CHECK-LABEL: @test_vqshlb_n_s8(
-// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> undef, i8 %a, i64 0
-// CHECK: [[VQSHLB_N_S8:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqshl.v8i8(<8 x i8> [[TMP0]], <8 x i8> <i8 7, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>)
+// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %a, i64 0
+// CHECK: [[VQSHLB_N_S8:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqshl.v8i8(<8 x i8> [[TMP0]], <8 x i8> <i8 7, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>)
// CHECK: [[TMP1:%.*]] = extractelement <8 x i8> [[VQSHLB_N_S8]], i64 0
// CHECK: ret i8 [[TMP1]]
int8_t test_vqshlb_n_s8(int8_t a) {
@@ -14485,8 +14485,8 @@
}
// CHECK-LABEL: @test_vqshlh_n_s16(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
-// CHECK: [[VQSHLH_N_S16:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqshl.v4i16(<4 x i16> [[TMP0]], <4 x i16> <i16 15, i16 undef, i16 undef, i16 undef>)
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %a, i64 0
+// CHECK: [[VQSHLH_N_S16:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqshl.v4i16(<4 x i16> [[TMP0]], <4 x i16> <i16 15, i16 0, i16 0, i16 0>)
// CHECK: [[TMP1:%.*]] = extractelement <4 x i16> [[VQSHLH_N_S16]], i64 0
// CHECK: ret i16 [[TMP1]]
int16_t test_vqshlh_n_s16(int16_t a) {
@@ -14635,8 +14635,8 @@
}
// CHECK-LABEL: @test_vqshlb_n_u8(
-// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> undef, i8 %a, i64 0
-// CHECK: [[VQSHLB_N_U8:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqshl.v8i8(<8 x i8> [[TMP0]], <8 x i8> <i8 7, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>)
+// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %a, i64 0
+// CHECK: [[VQSHLB_N_U8:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqshl.v8i8(<8 x i8> [[TMP0]], <8 x i8> <i8 7, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>)
// CHECK: [[TMP1:%.*]] = extractelement <8 x i8> [[VQSHLB_N_U8]], i64 0
// CHECK: ret i8 [[TMP1]]
uint8_t test_vqshlb_n_u8(uint8_t a) {
@@ -14644,8 +14644,8 @@
}
// CHECK-LABEL: @test_vqshlh_n_u16(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
-// CHECK: [[VQSHLH_N_U16:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqshl.v4i16(<4 x i16> [[TMP0]], <4 x i16> <i16 15, i16 undef, i16 undef, i16 undef>)
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %a, i64 0
+// CHECK: [[VQSHLH_N_U16:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqshl.v4i16(<4 x i16> [[TMP0]], <4 x i16> <i16 15, i16 0, i16 0, i16 0>)
// CHECK: [[TMP1:%.*]] = extractelement <4 x i16> [[VQSHLH_N_U16]], i64 0
// CHECK: ret i16 [[TMP1]]
uint16_t test_vqshlh_n_u16(uint16_t a) {
@@ -14676,8 +14676,8 @@
}
// CHECK-LABEL: @test_vqshlub_n_s8(
-// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> undef, i8 %a, i64 0
-// CHECK: [[VQSHLUB_N_S8:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqshlu.v8i8(<8 x i8> [[TMP0]], <8 x i8> <i8 7, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>)
+// CHECK: [[TMP0:%.*]] = insertelement <8 x i8> zeroinitializer, i8 %a, i64 0
+// CHECK: [[VQSHLUB_N_S8:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqshlu.v8i8(<8 x i8> [[TMP0]], <8 x i8> <i8 7, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>)
// CHECK: [[TMP1:%.*]] = extractelement <8 x i8> [[VQSHLUB_N_S8]], i64 0
// CHECK: ret i8 [[TMP1]]
int8_t test_vqshlub_n_s8(int8_t a) {
@@ -14685,8 +14685,8 @@
}
// CHECK-LABEL: @test_vqshluh_n_s16(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
-// CHECK: [[VQSHLUH_N_S16:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqshlu.v4i16(<4 x i16> [[TMP0]], <4 x i16> <i16 15, i16 undef, i16 undef, i16 undef>)
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i16> zeroinitializer, i16 %a, i64 0
+// CHECK: [[VQSHLUH_N_S16:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqshlu.v4i16(<4 x i16> [[TMP0]], <4 x i16> <i16 15, i16 0, i16 0, i16 0>)
// CHECK: [[TMP1:%.*]] = extractelement <4 x i16> [[VQSHLUH_N_S16]], i64 0
// CHECK: ret i16 [[TMP1]]
int16_t test_vqshluh_n_s16(int16_t a) {
@@ -14801,7 +14801,7 @@
}
// CHECK-LABEL: @test_vqshrnh_n_s16(
-// CHECK: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 %a, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <8 x i16> zeroinitializer, i16 %a, i64 0
// CHECK: [[VQSHRNH_N_S16:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqshrn.v8i8(<8 x i16> [[TMP0]], i32 8)
// CHECK: [[TMP1:%.*]] = extractelement <8 x i8> [[VQSHRNH_N_S16]], i64 0
// CHECK: ret i8 [[TMP1]]
@@ -14810,7 +14810,7 @@
}
// CHECK-LABEL: @test_vqshrns_n_s32(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 %a, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i32> zeroinitializer, i32 %a, i64 0
// CHECK: [[VQSHRNS_N_S32:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqshrn.v4i16(<4 x i32> [[TMP0]], i32 16)
// CHECK: [[TMP1:%.*]] = extractelement <4 x i16> [[VQSHRNS_N_S32]], i64 0
// CHECK: ret i16 [[TMP1]]
@@ -14826,7 +14826,7 @@
}
// CHECK-LABEL: @test_vqshrnh_n_u16(
-// CHECK: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 %a, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <8 x i16> zeroinitializer, i16 %a, i64 0
// CHECK: [[VQSHRNH_N_U16:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqshrn.v8i8(<8 x i16> [[TMP0]], i32 8)
// CHECK: [[TMP1:%.*]] = extractelement <8 x i8> [[VQSHRNH_N_U16]], i64 0
// CHECK: ret i8 [[TMP1]]
@@ -14835,7 +14835,7 @@
}
// CHECK-LABEL: @test_vqshrns_n_u32(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 %a, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i32> zeroinitializer, i32 %a, i64 0
// CHECK: [[VQSHRNS_N_U32:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqshrn.v4i16(<4 x i32> [[TMP0]], i32 16)
// CHECK: [[TMP1:%.*]] = extractelement <4 x i16> [[VQSHRNS_N_U32]], i64 0
// CHECK: ret i16 [[TMP1]]
@@ -14851,7 +14851,7 @@
}
// CHECK-LABEL: @test_vqrshrnh_n_s16(
-// CHECK: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 %a, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <8 x i16> zeroinitializer, i16 %a, i64 0
// CHECK: [[VQRSHRNH_N_S16:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqrshrn.v8i8(<8 x i16> [[TMP0]], i32 8)
// CHECK: [[TMP1:%.*]] = extractelement <8 x i8> [[VQRSHRNH_N_S16]], i64 0
// CHECK: ret i8 [[TMP1]]
@@ -14860,7 +14860,7 @@
}
// CHECK-LABEL: @test_vqrshrns_n_s32(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 %a, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i32> zeroinitializer, i32 %a, i64 0
// CHECK: [[VQRSHRNS_N_S32:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrshrn.v4i16(<4 x i32> [[TMP0]], i32 16)
// CHECK: [[TMP1:%.*]] = extractelement <4 x i16> [[VQRSHRNS_N_S32]], i64 0
// CHECK: ret i16 [[TMP1]]
@@ -14876,7 +14876,7 @@
}
// CHECK-LABEL: @test_vqrshrnh_n_u16(
-// CHECK: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 %a, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <8 x i16> zeroinitializer, i16 %a, i64 0
// CHECK: [[VQRSHRNH_N_U16:%.*]] = call <8 x i8> @llvm.aarch64.neon.uqrshrn.v8i8(<8 x i16> [[TMP0]], i32 8)
// CHECK: [[TMP1:%.*]] = extractelement <8 x i8> [[VQRSHRNH_N_U16]], i64 0
// CHECK: ret i8 [[TMP1]]
@@ -14885,7 +14885,7 @@
}
// CHECK-LABEL: @test_vqrshrns_n_u32(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 %a, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i32> zeroinitializer, i32 %a, i64 0
// CHECK: [[VQRSHRNS_N_U32:%.*]] = call <4 x i16> @llvm.aarch64.neon.uqrshrn.v4i16(<4 x i32> [[TMP0]], i32 16)
// CHECK: [[TMP1:%.*]] = extractelement <4 x i16> [[VQRSHRNS_N_U32]], i64 0
// CHECK: ret i16 [[TMP1]]
@@ -14901,7 +14901,7 @@
}
// CHECK-LABEL: @test_vqshrunh_n_s16(
-// CHECK: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 %a, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <8 x i16> zeroinitializer, i16 %a, i64 0
// CHECK: [[VQSHRUNH_N_S16:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqshrun.v8i8(<8 x i16> [[TMP0]], i32 8)
// CHECK: [[TMP1:%.*]] = extractelement <8 x i8> [[VQSHRUNH_N_S16]], i64 0
// CHECK: ret i8 [[TMP1]]
@@ -14910,7 +14910,7 @@
}
// CHECK-LABEL: @test_vqshruns_n_s32(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 %a, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i32> zeroinitializer, i32 %a, i64 0
// CHECK: [[VQSHRUNS_N_S32:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqshrun.v4i16(<4 x i32> [[TMP0]], i32 16)
// CHECK: [[TMP1:%.*]] = extractelement <4 x i16> [[VQSHRUNS_N_S32]], i64 0
// CHECK: ret i16 [[TMP1]]
@@ -14926,7 +14926,7 @@
}
// CHECK-LABEL: @test_vqrshrunh_n_s16(
-// CHECK: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 %a, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <8 x i16> zeroinitializer, i16 %a, i64 0
// CHECK: [[VQRSHRUNH_N_S16:%.*]] = call <8 x i8> @llvm.aarch64.neon.sqrshrun.v8i8(<8 x i16> [[TMP0]], i32 8)
// CHECK: [[TMP1:%.*]] = extractelement <8 x i8> [[VQRSHRUNH_N_S16]], i64 0
// CHECK: ret i8 [[TMP1]]
@@ -14935,7 +14935,7 @@
}
// CHECK-LABEL: @test_vqrshruns_n_s32(
-// CHECK: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 %a, i64 0
+// CHECK: [[TMP0:%.*]] = insertelement <4 x i32> zeroinitializer, i32 %a, i64 0
// CHECK: [[VQRSHRUNS_N_S32:%.*]] = call <4 x i16> @llvm.aarch64.neon.sqrshrun.v4i16(<4 x i32> [[TMP0]], i32 16)
// CHECK: [[TMP1:%.*]] = extractelement <4 x i16> [[VQRSHRUNS_N_S32]], i64 0
// CHECK: ret i16 [[TMP1]]
Index: clang/lib/CodeGen/CGBuiltin.cpp
===================================================================
--- clang/lib/CodeGen/CGBuiltin.cpp
+++ clang/lib/CodeGen/CGBuiltin.cpp
@@ -5050,8 +5050,11 @@
// it before inserting.
Ops[j] =
CGF.Builder.CreateTruncOrBitCast(Ops[j], ArgTy->getVectorElementType());
- Ops[j] =
- CGF.Builder.CreateInsertElement(UndefValue::get(ArgTy), Ops[j], C0);
+ // If we use undef some intrinsics like vqshrns_n_u32 might set the
+ // saturation flag with the undef elements, so instead insert into a zero
+ // vector so we don't get unwanted side effects.
+ Value *ZeroVector = Constant::getNullValue(cast<llvm::VectorType>(ArgTy));
+ Ops[j] = CGF.Builder.CreateInsertElement(ZeroVector, Ops[j], C0);
}
Value *Result = CGF.EmitNeonCall(F, Ops, s);
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