This revision was automatically updated to reflect the committed changes.
Closed by commit rL351694: [X86] Remove the cvtuqq2ps256/cvtqq2ps256 mask
builtins. Replace with… (authored by ctopper, committed by ).
Herald added a subscriber: llvm-commits.
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D56965/new/
https://reviews.llvm.org/D56965
Files:
cfe/trunk/include/clang/Basic/BuiltinsX86.def
cfe/trunk/lib/Headers/avx512vldqintrin.h
cfe/trunk/test/CodeGen/avx512vldq-builtins.c
Index: cfe/trunk/lib/Headers/avx512vldqintrin.h
===================================================================
--- cfe/trunk/lib/Headers/avx512vldqintrin.h
+++ cfe/trunk/lib/Headers/avx512vldqintrin.h
@@ -523,23 +523,21 @@
static __inline__ __m128 __DEFAULT_FN_ATTRS256
_mm256_cvtepi64_ps (__m256i __A) {
- return (__m128) __builtin_ia32_cvtqq2ps256_mask ((__v4di) __A,
- (__v4sf) _mm_setzero_ps(),
- (__mmask8) -1);
+ return (__m128)__builtin_convertvector((__v4di)__A, __v4sf);
}
static __inline__ __m128 __DEFAULT_FN_ATTRS256
_mm256_mask_cvtepi64_ps (__m128 __W, __mmask8 __U, __m256i __A) {
- return (__m128) __builtin_ia32_cvtqq2ps256_mask ((__v4di) __A,
- (__v4sf) __W,
- (__mmask8) __U);
+ return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
+ (__v4sf)_mm256_cvtepi64_ps(__A),
+ (__v4sf)__W);
}
static __inline__ __m128 __DEFAULT_FN_ATTRS256
_mm256_maskz_cvtepi64_ps (__mmask8 __U, __m256i __A) {
- return (__m128) __builtin_ia32_cvtqq2ps256_mask ((__v4di) __A,
- (__v4sf) _mm_setzero_ps(),
- (__mmask8) __U);
+ return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
+ (__v4sf)_mm256_cvtepi64_ps(__A),
+ (__v4sf)_mm_setzero_ps());
}
static __inline__ __m128i __DEFAULT_FN_ATTRS128
@@ -771,23 +769,21 @@
static __inline__ __m128 __DEFAULT_FN_ATTRS256
_mm256_cvtepu64_ps (__m256i __A) {
- return (__m128) __builtin_ia32_cvtuqq2ps256_mask ((__v4di) __A,
- (__v4sf) _mm_setzero_ps(),
- (__mmask8) -1);
+ return (__m128)__builtin_convertvector((__v4du)__A, __v4sf);
}
static __inline__ __m128 __DEFAULT_FN_ATTRS256
_mm256_mask_cvtepu64_ps (__m128 __W, __mmask8 __U, __m256i __A) {
- return (__m128) __builtin_ia32_cvtuqq2ps256_mask ((__v4di) __A,
- (__v4sf) __W,
- (__mmask8) __U);
+ return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
+ (__v4sf)_mm256_cvtepu64_ps(__A),
+ (__v4sf)__W);
}
static __inline__ __m128 __DEFAULT_FN_ATTRS256
_mm256_maskz_cvtepu64_ps (__mmask8 __U, __m256i __A) {
- return (__m128) __builtin_ia32_cvtuqq2ps256_mask ((__v4di) __A,
- (__v4sf) _mm_setzero_ps(),
- (__mmask8) __U);
+ return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
+ (__v4sf)_mm256_cvtepu64_ps(__A),
+ (__v4sf)_mm_setzero_ps());
}
#define _mm_range_pd(A, B, C) \
Index: cfe/trunk/include/clang/Basic/BuiltinsX86.def
===================================================================
--- cfe/trunk/include/clang/Basic/BuiltinsX86.def
+++ cfe/trunk/include/clang/Basic/BuiltinsX86.def
@@ -1301,7 +1301,6 @@
TARGET_BUILTIN(__builtin_ia32_cvtps2uqq128_mask, "V2LLiV4fV2LLiUc", "ncV:128:", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvtps2uqq256_mask, "V4LLiV4fV4LLiUc", "ncV:256:", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvtqq2ps128_mask, "V4fV2LLiV4fUc", "ncV:128:", "avx512vl,avx512dq")
-TARGET_BUILTIN(__builtin_ia32_cvtqq2ps256_mask, "V4fV4LLiV4fUc", "ncV:256:", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvttpd2qq128_mask, "V2LLiV2dV2LLiUc", "ncV:128:", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvttpd2qq256_mask, "V4LLiV4dV4LLiUc", "ncV:256:", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvttpd2uqq128_mask, "V2LLiV2dV2LLiUc", "ncV:128:", "avx512vl,avx512dq")
@@ -1311,7 +1310,6 @@
TARGET_BUILTIN(__builtin_ia32_cvttps2uqq128_mask, "V2LLiV4fV2LLiUc", "ncV:128:", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvttps2uqq256_mask, "V4LLiV4fV4LLiUc", "ncV:256:", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvtuqq2ps128_mask, "V4fV2LLiV4fUc", "ncV:128:", "avx512vl,avx512dq")
-TARGET_BUILTIN(__builtin_ia32_cvtuqq2ps256_mask, "V4fV4LLiV4fUc", "ncV:256:", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_rangepd128_mask, "V2dV2dV2dIiV2dUc", "ncV:128:", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_rangepd256_mask, "V4dV4dV4dIiV4dUc", "ncV:256:", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_rangeps128_mask, "V4fV4fV4fIiV4fUc", "ncV:128:", "avx512vl,avx512dq")
Index: cfe/trunk/test/CodeGen/avx512vldq-builtins.c
===================================================================
--- cfe/trunk/test/CodeGen/avx512vldq-builtins.c
+++ cfe/trunk/test/CodeGen/avx512vldq-builtins.c
@@ -479,19 +479,21 @@
__m128 test_mm256_cvtepi64_ps(__m256i __A) {
// CHECK-LABEL: @test_mm256_cvtepi64_ps
- // CHECK: @llvm.x86.avx512.mask.cvtqq2ps.256
+ // CHECK: sitofp <4 x i64> %{{.*}} to <4 x float>
return _mm256_cvtepi64_ps(__A);
}
__m128 test_mm256_mask_cvtepi64_ps(__m128 __W, __mmask8 __U, __m256i __A) {
// CHECK-LABEL: @test_mm256_mask_cvtepi64_ps
- // CHECK: @llvm.x86.avx512.mask.cvtqq2ps.256
+ // CHECK: sitofp <4 x i64> %{{.*}} to <4 x float>
+ // select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}
return _mm256_mask_cvtepi64_ps(__W, __U, __A);
}
__m128 test_mm256_maskz_cvtepi64_ps(__mmask8 __U, __m256i __A) {
// CHECK-LABEL: @test_mm256_maskz_cvtepi64_ps
- // CHECK: @llvm.x86.avx512.mask.cvtqq2ps.256
+ // CHECK: sitofp <4 x i64> %{{.*}} to <4 x float>
+ // select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}
return _mm256_maskz_cvtepi64_ps(__U, __A);
}
@@ -699,19 +701,21 @@
__m128 test_mm256_cvtepu64_ps(__m256i __A) {
// CHECK-LABEL: @test_mm256_cvtepu64_ps
- // CHECK: @llvm.x86.avx512.mask.cvtuqq2ps.256
+ // CHECK: uitofp <4 x i64> %{{.*}} to <4 x float>
return _mm256_cvtepu64_ps(__A);
}
__m128 test_mm256_mask_cvtepu64_ps(__m128 __W, __mmask8 __U, __m256i __A) {
// CHECK-LABEL: @test_mm256_mask_cvtepu64_ps
- // CHECK: @llvm.x86.avx512.mask.cvtuqq2ps.256
+ // CHECK: uitofp <4 x i64> %{{.*}} to <4 x float>
+ // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}
return _mm256_mask_cvtepu64_ps(__W, __U, __A);
}
__m128 test_mm256_maskz_cvtepu64_ps(__mmask8 __U, __m256i __A) {
// CHECK-LABEL: @test_mm256_maskz_cvtepu64_ps
- // CHECK: @llvm.x86.avx512.mask.cvtuqq2ps.256
+ // CHECK: uitofp <4 x i64> %{{.*}} to <4 x float>
+ // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}
return _mm256_maskz_cvtepu64_ps(__U, __A);
}
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