olista01 added inline comments.
================
Comment at: src/DwarfInstructions.hpp:210
+ register unsigned long long x16 __asm("x16") = cfa;
+ asm("autia1716": "+r"(x17): "r"(x16));
+ returnAddress = x17;
----------------
I don't think this will work for cross-unwinding builds: for them,
_LIBUNWIND_TARGET_AARCH64 is defined even when the compilation target is not
AArch64, so this instruction won't exist.
Fully supporting cross-unwinding looks non-trivial: we'd need to either provide
some way to ask the client to authenticate a pointer on the target, or strip
the high bits of the pointer (which requires knowing the virtual address size
of the target). For now, I think it's OK to not support cross-unwinding.
================
Comment at: src/Registers.hpp:1835
+ if (((regNum >= 0) && (regNum < 32)) || regNum == UNW_ARM64_RA_SIGN_STATE)
return _registers.__x[regNum];
+
----------------
When regNum == UNW_ARM64_RA_SIGN_STATE, the index into __x is out of range.
We'll need to add new storage to hold this value, I'd suggest replacing the
current padding value in the GPRs struct, as that will avoid changing the
layout expected by the context save/restore functions.
================
Comment at: src/Registers.hpp:1845
_registers.__sp = value;
- else if ((regNum >= 0) && (regNum < 32))
+ else if ((regNum >= 0) && (regNum < 32) || regNum == UNW_ARM64_RA_SIGN_STATE)
_registers.__x[regNum] = value;
----------------
Ditto.
Repository:
rUNW libunwind
https://reviews.llvm.org/D51432
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