[PATCH] D15749: [X86][ms-inline asm] Test case for adding support for memory operands that include structs

[Marina Yatsina via cfe-commits]

myatsina created this revision.
myatsina added reviewers: rnk, mcrosier.
myatsina added subscribers: llvm-commits, cfe-commits.
myatsina set the repository for this revision to rL LLVM.

Test case for review:
http://reviews.llvm.org/D15748


Repository:
  rL LLVM

http://reviews.llvm.org/D15749

Files:
  test/CodeGen/ms-inline-asm.c

Index: test/CodeGen/ms-inline-asm.c
===================================================================
--- test/CodeGen/ms-inline-asm.c
+++ test/CodeGen/ms-inline-asm.c
@@ -536,6 +536,38 @@
 // CHECK: "=*m,~{dirflag},~{fpsr},~{flags}"(i32* %flags)
 }
 
+void t43() {
+// CHECK-LABEL: define void @t43
+  C strct;
+// Work around PR20368: These should be single line blocks
+ __asm { mov eax, 4[strct.c1] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", 
"*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+  __asm { mov eax, 4[strct.c3 + 4] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$8$0", 
"*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+  __asm { mov eax, 8[strct.c2.a + 4 + 32*2 - 4] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$72$0", 
"*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+  __asm { mov eax, 12[4 + strct.c2.b] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$16$0", 
"*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+  __asm { mov eax, 4[4 + strct.c4.b2.b + 4] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$12$0", 
"*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+  __asm { mov eax, 4[64 + strct.c1 + (2*32)] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$132$0", 
"*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+  __asm { mov eax, 4[64 + strct.c2.a - 2*32] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", 
"*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+  __asm { mov eax, [strct.c4.b1 + 4] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", 
"*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+  __asm { mov eax, [strct.c4.b2.a + 4 + 32*2 - 4] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$64$0", 
"*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+  __asm { mov eax, [4 + strct.c1] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", 
"*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+  __asm { mov eax, [4 + strct.c2.b + 4] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$8$0", 
"*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+  __asm { mov eax, [64 + strct.c3 + (2*32)] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$128$0", 
"*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+  __asm { mov eax, [64 + strct.c4.b2.b - 2*32] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $0", 
"*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+}
+
 void call_clobber() {
   __asm call t41
   // CHECK-LABEL: define void @call_clobber



Index: test/CodeGen/ms-inline-asm.c
===================================================================
--- test/CodeGen/ms-inline-asm.c
+++ test/CodeGen/ms-inline-asm.c
@@ -536,6 +536,38 @@
 // CHECK: "=*m,~{dirflag},~{fpsr},~{flags}"(i32* %flags)
 }
 
+void t43() {
+// CHECK-LABEL: define void @t43
+  C strct;
+// Work around PR20368: These should be single line blocks
+ __asm { mov eax, 4[strct.c1] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+  __asm { mov eax, 4[strct.c3 + 4] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$8$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+  __asm { mov eax, 8[strct.c2.a + 4 + 32*2 - 4] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$72$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+  __asm { mov eax, 12[4 + strct.c2.b] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$16$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+  __asm { mov eax, 4[4 + strct.c4.b2.b + 4] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$12$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+  __asm { mov eax, 4[64 + strct.c1 + (2*32)] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$132$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+  __asm { mov eax, 4[64 + strct.c2.a - 2*32] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+  __asm { mov eax, [strct.c4.b1 + 4] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+  __asm { mov eax, [strct.c4.b2.a + 4 + 32*2 - 4] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$64$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+  __asm { mov eax, [4 + strct.c1] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$4$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+  __asm { mov eax, [4 + strct.c2.b + 4] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$8$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+  __asm { mov eax, [64 + strct.c3 + (2*32)] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $$128$0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+  __asm { mov eax, [64 + strct.c4.b2.b - 2*32] }
+// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr $0", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
+}
+
 void call_clobber() {
   __asm call t41
   // CHECK-LABEL: define void @call_clobber

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