Author: abataev
Date: Thu Sep 3 22:42:23 2015
New Revision: 246835
URL: http://llvm.org/viewvc/llvm-project?rev=246835&view=rev
Log:
[X86-64] Allow additional register names in inline assembler.
Patch allows to recognize additional registers x8d, x8b, x8w - x15d, x15b, x15w
in inline assembler, already recognized by backend
Differential Revision: http://reviews.llvm.org/D12594
Added:
cfe/trunk/test/CodeGen/asm_64.c (with props)
Modified:
cfe/trunk/lib/Basic/Targets.cpp
Modified: cfe/trunk/lib/Basic/Targets.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=246835&r1=246834&r2=246835&view=diff
==============================================================================
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Thu Sep 3 22:42:23 2015
@@ -2051,6 +2051,14 @@ const TargetInfo::AddlRegName AddlRegNam
{ { "edi", "rdi" }, 5 },
{ { "esp", "rsp" }, 7 },
{ { "ebp", "rbp" }, 6 },
+ { { "r8d", "r8w", "r8b" }, 38 },
+ { { "r9d", "r9w", "r9b" }, 39 },
+ { { "r10d", "r10w", "r10b" }, 40 },
+ { { "r11d", "r11w", "r11b" }, 41 },
+ { { "r12d", "r12w", "r12b" }, 42 },
+ { { "r13d", "r13w", "r13b" }, 43 },
+ { { "r14d", "r14w", "r14b" }, 44 },
+ { { "r15d", "r15w", "r15b" }, 45 },
};
// X86 target abstract base class; x86-32 and x86-64 are very close, so
Added: cfe/trunk/test/CodeGen/asm_64.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/asm_64.c?rev=246835&view=auto
==============================================================================
--- cfe/trunk/test/CodeGen/asm_64.c (added)
+++ cfe/trunk/test/CodeGen/asm_64.c Thu Sep 3 22:42:23 2015
@@ -0,0 +1,53 @@
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm %s -o - |
FileCheck %s
+
+// CHECK-LABEL: @t1
+void t1() {
+ __asm__ ("mov r8w, 100;");
+ // CHECK: call void asm sideeffect "mov r8w, 100;"
+ __asm__ ("mov r8d, 100;");
+ // CHECK: call void asm sideeffect "mov r8d, 100;"
+ __asm__ ("mov r8b, 100;");
+ // CHECK: call void asm sideeffect "mov r8b, 100;"
+ __asm__ ("mov r9w, 100;");
+ // CHECK: call void asm sideeffect "mov r9w, 100;"
+ __asm__ ("mov r9d, 100;");
+ // CHECK: call void asm sideeffect "mov r9d, 100;"
+ __asm__ ("mov r9b, 100;");
+ // CHECK: call void asm sideeffect "mov r9b, 100;"
+ __asm__ ("mov r10w, 100;");
+ // CHECK: call void asm sideeffect "mov r10w, 100;"
+ __asm__ ("mov r10d, 100;");
+ // CHECK: call void asm sideeffect "mov r10d, 100;"
+ __asm__ ("mov r10b, 100;");
+ // CHECK: call void asm sideeffect "mov r10b, 100;"
+ __asm__ ("mov r11w, 100;");
+ // CHECK: call void asm sideeffect "mov r11w, 100;"
+ __asm__ ("mov r11d, 100;");
+ // CHECK: call void asm sideeffect "mov r11d, 100;"
+ __asm__ ("mov r11b, 100;");
+ // CHECK: call void asm sideeffect "mov r11b, 100;"
+ __asm__ ("mov r12w, 100;");
+ // CHECK: call void asm sideeffect "mov r12w, 100;"
+ __asm__ ("mov r12d, 100;");
+ // CHECK: call void asm sideeffect "mov r12d, 100;"
+ __asm__ ("mov r12b, 100;");
+ // CHECK: call void asm sideeffect "mov r12b, 100;"
+ __asm__ ("mov r13w, 100;");
+ // CHECK: call void asm sideeffect "mov r13w, 100;"
+ __asm__ ("mov r13d, 100;");
+ // CHECK: call void asm sideeffect "mov r13d, 100;"
+ __asm__ ("mov r13b, 100;");
+ // CHECK: call void asm sideeffect "mov r13b, 100;"
+ __asm__ ("mov r14w, 100;");
+ // CHECK: call void asm sideeffect "mov r14w, 100;"
+ __asm__ ("mov r14d, 100;");
+ // CHECK: call void asm sideeffect "mov r14d, 100;"
+ __asm__ ("mov r14b, 100;");
+ // CHECK: call void asm sideeffect "mov r14b, 100;"
+ __asm__ ("mov r15w, 100;");
+ // CHECK: call void asm sideeffect "mov r15w, 100;"
+ __asm__ ("mov r15d, 100;");
+ // CHECK: call void asm sideeffect "mov r15d, 100;"
+ __asm__ ("mov r15b, 100;");
+ // CHECK: call void asm sideeffect "mov r15b, 100;"
+}
Propchange: cfe/trunk/test/CodeGen/asm_64.c
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Propchange: cfe/trunk/test/CodeGen/asm_64.c
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Propchange: cfe/trunk/test/CodeGen/asm_64.c
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