On Mon, Jul 6, 2015 at 7:51 PM, Eric Christopher <[email protected]> wrote: > Author: echristo > Date: Mon Jul 6 18:51:59 2015 > New Revision: 241525 > > URL: http://llvm.org/viewvc/llvm-project?rev=241525&view=rev > Log: > Handle arbitrary whitespace in the target attribute support. > > This allows us to deal a bit more gracefully with inclusions done > by macros, token pasting, or just code layout/formatting.
Thank you! ~Aaron > > Modified: > cfe/trunk/lib/CodeGen/CGCall.cpp > cfe/trunk/test/CodeGen/attr-target.c > > Modified: cfe/trunk/lib/CodeGen/CGCall.cpp > URL: > http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGCall.cpp?rev=241525&r1=241524&r2=241525&view=diff > ============================================================================== > --- cfe/trunk/lib/CodeGen/CGCall.cpp (original) > +++ cfe/trunk/lib/CodeGen/CGCall.cpp Mon Jul 6 18:51:59 2015 > @@ -1514,9 +1514,13 @@ void CodeGenModule::ConstructAttributeLi > // Grab the various features and prepend a "+" to turn on the > feature to > // the backend and add them to our existing set of features. > for (auto &Feature : AttrFeatures) { > + // Go ahead and trim whitespace rather than either erroring or > + // accepting it weirdly. > + Feature = Feature.trim(); > + > // While we're here iterating check for a different target cpu. > if (Feature.startswith("arch=")) > - TargetCPU = Feature.split("=").second; > + TargetCPU = Feature.split("=").second.trim(); > else if (Feature.startswith("tune=")) > // We don't support cpu tuning this way currently. > ; > > Modified: cfe/trunk/test/CodeGen/attr-target.c > URL: > http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/attr-target.c?rev=241525&r1=241524&r2=241525&view=diff > ============================================================================== > --- cfe/trunk/test/CodeGen/attr-target.c (original) > +++ cfe/trunk/test/CodeGen/attr-target.c Mon Jul 6 18:51:59 2015 > @@ -13,6 +13,8 @@ int __attribute__((target("sse4"))) pand > > int bar(int a) { return baz(a) + foo(a); } > > +int __attribute__((target("avx, sse4.2, arch= ivybridge"))) > qux(int a) { return 4; } > + > // Check that we emit the additional subtarget and cpu features for foo and > not for baz or bar. > // CHECK: baz{{.*}} #0 > // CHECK: foo{{.*}} #1 > @@ -22,6 +24,7 @@ int bar(int a) { return baz(a) + foo(a); > // CHECK: koala{{.*}} #0 > // CHECK: echidna{{.*}} #2 > // CHECK: bar{{.*}} #0 > +// CHECK: qux{{.*}} #1 > // CHECK: #0 = {{.*}}"target-cpu"="x86-64" "target-features"="+sse,+sse2" > // CHECK: #1 = {{.*}}"target-cpu"="ivybridge" > "target-features"="+avx,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3" > // CHECK: #2 = {{.*}}"target-cpu"="x86-64" > "target-features"="+sse,-aes,-avx,-avx2,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512pf,-avx512vl,-f16c,-fma,-fma4,-pclmul,-sha,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-xop" > > > _______________________________________________ > cfe-commits mailing list > [email protected] > http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits _______________________________________________ cfe-commits mailing list [email protected] http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits
