hi dave, for more ethernet I/O from xilinx's RFSOC 2x2 board, you might be able plug in this $80 dual SFP+ SYZYGY board:
https://opalkelly.com/products/szg-dualsfp/ but i don't know if xilinx connected the appropriate syzygy pins to FPGA high speed serdes lines. dan On Wed, Feb 10, 2021 at 2:53 PM Dan Werthimer <[email protected]> wrote: > > > hi dave, > > > i think the $1900 two input RFSOC 2x2 board only has 1 Gbe. > > > if you need higher I/O rates, they have a syzygy parallel I/O connector: > > > >>> The GEM is connected to the ARM PS of the RFSOC > > >>> The Syzygy interface is the primary PL offload connector, Dan > > >>> 28 single-ended signals (incl. 8 differential pairs) at ~ 250 Mbps > > >>> see Syzygy standard spec at https://syzygyfpga.io/specification/ > > > >>> The RFSoC 2x2 uses the XCZU28DR which is RFSoC Gen1 silicon > > that part has max sample rate of 4096 Msps per ADC. > > > dan > > > On Wed, Feb 10, 2021 at 2:48 PM David MacMahon <[email protected]> > wrote: > >> The RFSoC 2x2 sounds intriguing. It will be interesting to see all its >> capabilities (e.g. will it have high speed networking or other digital >> I/O?). >> >> I enjoyed the web site's positive spin on the conference's virtual >> nature: >> >> "Breakfast is available daily in the kitchen. Menu may vary by locale." >> >> Bon appétit, >> Dave >> >> On Feb 10, 2021, at 11:00, Dan Werthimer <[email protected]> wrote: >> >> >> >> dear casper community, >> >> please see email below from xilinx's patrick lysaght, >> about their new low cost RFSOC board for academia, >> and the february 28 tutorial about this board. >> >> best wishes, >> >> dan >> >> ---------- Forwarded message --------- >> Date: Wed, Feb 10, 2021 at 10:00 AM >> Subject: Emailing: isfpga_rfsoc_2x2_tutorial.jpg >> >> >> Dear Friends >> >> I hope you are all doing well in 2021. I have some good news that I >> would like to share with you. At the end of Feb, we will launch a new >> RFSoC platform for academia. It features a new board, the RFSoC 2x2, >> supported with open source designs and teaching material. We will be >> hosting a tutorial on Sunday 28th Feb from 8 - 10 AM PST as part of the >> ISFPGA 2021 conference (https://isfpga.org/) to announce and introduce >> the new RFSoC 2x2 platform. Everyone is welcome to attend the tutorial and >> registration is free for students. >> >> Would you kindly share this invitation with the CASPER community? For >> those who would like to attend, links to the tutorial site and the >> registration pages are provided below. I have also attached a graphic >> summarizing the tutorial. >> >> Best .. Patrick >> >> More details ... >> A Low-Cost Teaching and Research Platform Based on Xilinx RFSoC >> Technology and the PYNQ Framework >> Time: February 28, 8:00 AM - 10:00 AM PST >> Organizer: Patrick Lysaght (Xilinx), Robert W. Stewart (Strathclyde) >> >> The Xilinx Zynq(r) UltraScale+(tm) RFSoC architecture integrates ZU+ >> MPSoCs with state-of-the-art, analog-to-digital (ADC) and digital-to-analog >> (DAC) data converters. The combination of banks of high-precision data >> converters, capable of processing multi giga samples of data per second, >> along with FPGA fabric and ARM processors creates a uniquely powerful >> family architecture. RFSoC technology re-defines what is possible in >> applications such as software defined radio (SDR) and advanced >> instrumentation. >> This tutorial introduces a new low-cost teaching and research platform >> for RFSoC, designed especially for academia. The platform exploits the PYNQ >> open-source framework to provide a highly intuitive user system interface >> incorporating Linux, Python and Jupyter notebooks. It also comes with a >> suite of open-source teaching resources including videos, notebooks and >> design examples. >> We will demonstrate the benefits of integrating direct RF sampling data >> converters by introducing a novel, open-source spectrum analyzer built >> using the new board. This RFSoC design exploits advanced signal processing >> techniques, including higher-order Nyquist zones, to demonstrate >> performance that has only previously been achieved on very high-end >> instrumentation. Using the spectrum analyzer example, we will also >> demonstrate new approaches to the rapid prototyping of graphical user >> interfaces for research demonstrators. >> >> Links ... >> ISFPGA tutorial page: http://bit.ly/ISFPGA_rfsoc2x2 >> Register for ISFPGA & tutorial here: http://bit.ly/ISFPGA_rfsoc2x2 >> #Xilinx #RFSoC >> >> >> >> >> This email and any attachments are intended for the sole use of the named >> recipient(s) and contain(s) confidential information that may be >> proprietary, privileged or copyrighted under applicable law. If you are not >> the intended recipient, do not read, copy, or forward this email message or >> any attachments. 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