Hello, We are setting up the digital back-end of a low-frequency telescope consisting of SNAP boards and GPUs. The SNAP boards packetize the data and send to the GPU processing nodes via 10 GbE links. We are currently programming the packetizer/depacketizer. I have a few questions about the 10gbe yellow blocks and endianness. We observed from the tutorials that the data stored in bram is big-endian. I would like to know how the data is handled by the 10gbe and in what form is it sent over the network. Our depacketizers run on Intel processors, which are little-endian. We are aware that network byte order is big-endian, but we noticed that integer data can be sent from one Intel machine to another via network without ever calling ntohl( ) or htonl( ) and the data was preserved. So, we would like to know if we need to correct the endianness when receiving the data from the SNAP.
If we need to perform this correction, is there a way we could possibly correct the endianness on the FPGA itself before input to the 10gbe block? Thanks, Nitish -- You received this message because you are subscribed to the Google Groups "[email protected]" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web visit https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/CAC6X4cOZhVBUvUfs1phQ2csuRnewowZkQ8PzjjBU62LUa0js%3Dw%40mail.gmail.com.
