On Sat, Nov 25, 2023 at 11:40:37AM +1100, Jonathan Gray wrote:
> On Thu, Nov 23, 2023 at 11:04:17PM +0000, Laurence Tratt wrote:
> > OpenBSD 7.4-current (GENERIC.MP) #1461: Mon Nov 20 19:55:51 MST 2023
> > [email protected]:/usr/src/sys/arch/amd64/compile/GENERIC.MP
> > real mem = 68431814656 (65261MB)
> > avail mem = 66338226176 (63265MB)
> > random: good seed from bootblocks
> > mpath0 at root
> > scsibus0 at mpath0: 256 targets
> > mainbus0 at root
> > bios0 at mainbus0: SMBIOS rev. 3.5 @ 0x75a58000 (104 entries)
> > bios0: vendor American Megatrends Inc. version "1501" date 10/05/2023
> > bios0: ASUS ROG STRIX Z790-H GAMING WIFI
> > efi0 at bios0: UEFI 2.8
> > efi0: American Megatrends rev 0x5001b
> > acpi0 at bios0: ACPI 6.4
> > acpi0: sleep states S0 S3 S4 S5
> > acpi0: tables DSDT FACP FIDT SSDT SSDT SSDT SSDT HPET APIC MCFG SSDT NHLT
> > LPIT SSDT SSDT DBGP DBG2 SSDT DMAR FPDT SSDT SSDT SSDT BGRT WPBT TPM2 PHAT
> > WSMT
> > acpi0: wakeup devices PEG1(S4) PEGP(S4) PEGP(S4) PEG0(S4) PEGP(S4)
> > RP09(S4) PXSX(S4) RP10(S4) PXSX(S4) RP11(S4) PXSX(S4) RP12(S4) PXSX(S4)
> > RP13(S4) PXSX(S4) RP14(S4) [...]
> > acpitimer0 at acpi0: 3579545 Hz, 24 bits
> > acpihpet0 at acpi0: 19200000 Hz
> > acpimadt0 at acpi0 addr 0xfee00000: PC-AT compat
> > cpu0 at mainbus0: apid 0 (boot processor)
> > cpu0: 13th Gen Intel(R) Core(TM) i9-13900K, 5502.28 MHz, 06-b7-01, patch
> > 0000011d
> > cpu0:
> > FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,SMX,EST,TM2,SSSE3,SDBG,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,ABM,3DNOWP,PERF,ITSC,FSGSBASE,TSC_ADJUST,BMI1,AVX2,SMEP,BMI2,ERMS,INVPCID,RDSEED,ADX,SMAP,CLFLUSHOPT,CLWB,PT,SHA,UMIP,PKU,WAITPKG,PKS,MD_CLEAR,IBT,IBRS,IBPB,STIBP,L1DF,SSBD,SENSOR,ARAT,IBRS_ALL,SKIP_L1DFL,MDS_NO,IF_PSCHANGE,TAA_NO,MISC_PKG_CT,ENERGY_FILT,DOITM,SBDR_SSDP_N,FBSDP_NO,PSDP_NO,RRSBA,OVERCLOCK,GDS_NO,XSAVEOPT,XSAVEC,XGETBV1,XSAVES
> > cpu0: 48KB 64b/line 12-way D-cache, 32KB 64b/line 8-way I-cache, 2MB
> > 64b/line 16-way L2 cache, 36MB 64b/line 12-way L3 cache
> > cpu0: smt 0, core 0, package 0
> > mtrr: Pentium Pro MTRR support, 10 var ranges, 88 fixed ranges
> > cpu0: apic clock running at 38MHz
> > cpu0: mwait min=64, max=64, C-substates=0.2.0.1.0.1.0.1, IBE
> ...
> > "INTC1085" at acpi0 not configured
>
> This is an acpi gpio device.
>
> In some cases interrupts and acpi events may not work if not configured.
kettenis@ noticed the gpi offsets for Alder Lake-S were wrong
updated diff:
Index: sys/dev/acpi/pchgpio.c
===================================================================
RCS file: /cvs/src/sys/dev/acpi/pchgpio.c,v
diff -u -p -r1.14 pchgpio.c
--- sys/dev/acpi/pchgpio.c 20 Oct 2022 20:40:57 -0000 1.14
+++ sys/dev/acpi/pchgpio.c 25 Nov 2023 12:18:52 -0000
@@ -115,6 +115,9 @@ const char *pchgpio_hids[] = {
"INT34C5",
"INT34C6",
"INTC1055",
+ "INTC1056",
+ "INTC1057",
+ "INTC1085",
NULL
};
@@ -311,6 +314,78 @@ const struct pchgpio_device tgl_h_device
.npins = 480,
};
+/* Alder Lake-S */
+
+const struct pchgpio_group adl_s_groups[] =
+{
+ /* Community 0 */
+ { 0, 0, 0, 24, 0 }, /* GPP_I */
+ { 0, 1, 25, 47, 32 }, /* GPP_R */
+ { 0, 2, 48, 59, 64 }, /* GPP_J */
+
+ /* Community 1 */
+ { 1, 0, 95, 118, 160 }, /* GPP_B */
+ { 1, 1, 119, 126, 192 }, /* GPP_G */
+ { 1, 2, 127, 150, 224 }, /* GPP_H */
+
+ /* Community 3 */
+ { 2, 1, 160, 175, 256 }, /* GPP_A */
+ { 2, 2, 176, 199, 288 }, /* GPP_C */
+
+ /* Community 4 */
+ { 3, 0, 200, 207, 320 }, /* GPP_S */
+ { 3, 1, 208, 230, 352 }, /* GPP_E */
+ { 3, 2, 231, 245, 384 }, /* GPP_K */
+ { 3, 3, 246, 269, 416 }, /* GPP_F */
+
+ /* Community 5 */
+ { 4, 0, 270, 294, 448 }, /* GPP_D */
+};
+
+const struct pchgpio_device adl_s_device =
+{
+ .pad_size = 16,
+ .gpi_is = 0x200,
+ .gpi_ie = 0x220,
+ .groups = adl_s_groups,
+ .ngroups = nitems(adl_s_groups),
+ .npins = 480,
+};
+
+/* Alder Lake-N */
+
+const struct pchgpio_group adl_n_groups[] =
+{
+ /* Community 0 */
+ { 0, 0, 0, 25, 0 }, /* GPP_B */
+ { 0, 1, 26, 41, 32 }, /* GPP_T */
+ { 0, 2, 42, 66, 64 }, /* GPP_A */
+
+ /* Community 1 */
+ { 1, 0, 67, 74, 96 }, /* GPP_S */
+ { 1, 1, 75, 94, 128 }, /* GPP_I */
+ { 1, 2, 95, 118, 160 }, /* GPP_H */
+ { 1, 3, 119, 139, 192 }, /* GPP_D */
+
+ /* Community 4 */
+ { 2, 0, 169, 192, 256 }, /* GPP_C */
+ { 2, 1, 193, 217, 288 }, /* GPP_F */
+ { 2, 3, 224, 248, 320 }, /* GPP_E */
+
+ /* Community 5 */
+ { 3, 0, 249, 256, 352 }, /* GPP_R */
+};
+
+const struct pchgpio_device adl_n_device =
+{
+ .pad_size = 16,
+ .gpi_is = 0x100,
+ .gpi_ie = 0x120,
+ .groups = adl_n_groups,
+ .ngroups = nitems(adl_n_groups),
+ .npins = 384,
+};
+
struct pchgpio_match pchgpio_devices[] = {
{ "INT344B", &spt_lp_device },
{ "INT3450", &cnl_h_device },
@@ -320,6 +395,9 @@ struct pchgpio_match pchgpio_devices[] =
{ "INT34C5", &tgl_lp_device },
{ "INT34C6", &tgl_h_device },
{ "INTC1055", &tgl_lp_device },
+ { "INTC1056", &adl_s_device },
+ { "INTC1057", &adl_n_device },
+ { "INTC1085", &adl_s_device },
};
int pchgpio_read_pin(void *, int);
