Hi,
Makefile allows to create pattern rule with multiple targets, like
below. This is very handy for rules which generates multiple files at
once.
%.h %.c : %.idl
touch $(<:%.idl=%.c) $(<:%.idl=%.h)
I tried to build static pattern rule in similar way, but it do not
work - make reports error "multiple target patterns":
$(IDLS:%.idl=%.c) $(IDLS:%.idl=%.h) : %.c %.h : %.idl
touch $(<:%.idl=%.c) $(<:%.idl=%.h)
I tested this using make 4.0 on Linux. Please fix this.
Regards,
Daniel
_______________________________________________
Bug-make mailing list
Bug-make@gnu.org
https://lists.gnu.org/mailman/listinfo/bug-make
