> If a variable is set in a parent makefile, and a child makefile is > included, is the variable also set in the child makefile. And the other way > around, when a variable is set in the child, is it also still usable in the > parent, or does it fall out of scope. > > I have figured this out with a simple example, but it would be useful to > have in the manual as well, I think. :)
Interesting. I found it obvious that inclusion was as if the included file were textually inserted at the point of inclusion; i.e. make doesn't make do any scoping at all, it's all just one big sequence of lines for make to read, from diverse files, in a single scope. You think that should be made explicit, presumably in node "3.3 Including Other Makefiles". The opening sentence is The `include' directive tells `make' to suspend reading the current makefile and read one or more other makefiles before continuing. I suggest following that with: The text thus read is treated exactly as if it were part of the original makefile, textually included in place of the `include' directive. Do you think that would have made it clear enough for you - before your experiments taught you what actually happens ? Eddy. _______________________________________________ Bug-make mailing list Bug-make@gnu.org https://lists.gnu.org/mailman/listinfo/bug-make