I just realized for simplicity and better understanding what I am trying
to achieve both makefiles could be merged into:
-------
dst ?= .
$(dst)/target1.out: $(dst)/test/Test.cc.o
@echo linking
$(dst)/%.cc.d: ../../src/target1/%.cc
@echo making dep
$(dst)/%.cc.o: ../../src/target1/%.cc
@echo compiling
-include $(dst)/test/Test.cc.d
-----------
Call without parameter it fails, with dst=foo it succeds.
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