Hi, I'm using GNU make 3.79.1 (with redhat 7.3 intel)
I'm stuck - I can't seem to figure out how to do a computed variable
reference, or maybe this is a subst function call. This describes the
problem
I have two non trival list of make targets that need to be built by
make. The lists are really identical except that one is for a debug
build, the other is for a release build.
The ordered list is built like this
xXx_ORDER += FOO_xXx_step1
xXx_ORDER += BLAH_xXx_OTHER
xXx_ORDER += THIS_xXx_THAT
I can then convert the xXx into DBG or REL via the subst function like
this
RAW_DBG_ORDER=$(subst xXx,DBG,$(xXx_ORDER))
RAW_REL_ORDER=$(subst xXx,DBG,$(xXx_ORDER))
My next step is I want to convert the value of the two orders into
macros... in effect, I want to do something like this:
DBG_ORDER=$(RAW_DBG_ORDER:%=$(%))
REL_ORDER=$(RAW_REL_ORDER:%=$(%))
The above fails. I was hoping for:
DBG_ORDER=${FOO_DBG_step1} ${BLAH_DBG_OTHER} ${THIS_DBG_THAT}
REL_ORDER=${FOO_REL_step1} ${BLAH_REL_OTHER} ${THIS_REL_THAT}
The result of which are macros that are defined in othe places,
which I now want Make to evaluate and subsitute.
I have also tried the $(call ...) macro within a $(foreach ...)
I'm not getting any where.
I have also tried to construct this with a computed variable reference
such as shown in central part of the 'Computed Variable' info
page. Unfortunatly that example is close - but not the cigar that
I am looking for - it does not iterate over the list of macros.
The nearest I have come is to execute a $(shell ...) passing the stuff
I need to a bash for loop that echos the text I'm looking for. But -
I can't seem to get make to evaluate the resulting text in other
places. Instead, the ${VAR} reference remains literally.
Perhaps there is another way.
Am I doing something wrong?
Any suggestions?
-Thanks.
Duane.
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