Hi,
During some recent development using GNU make 3.79.1,
I ran across this issue which, to me, doesn't seem
like
it fits with what is expected of target-specific
append variables. I've found a work-around, but
thought I'd bring the matter to your attention.
I apologize for the (probably) improper formatting
of the makefile included. Tabs, in particular, are
impossible to effect in this web browser's edit
window.
If you have any questions, please feel free to email
me. I do not have the config.h with which this
version
of Make was compiled, but the bug is consistent across
several platforms with the same version of Make
(Linux,
OpenBSD, Solaris, HPUX).
Thank you,
--Corey Brenner
8<----- SNIP -----8<
#
# Problem: appending to an undefined variable name as
part of a
# target rule (where you might conceivably
want to add
# a definition for some variable which gets
expanded by
# a suffix rule, for instance,) does not
autovivify the
# variable. instead, it claims that the
variable
# references itself, and dies.
#
# Expected behavior:
# I expected "DEFINES += -Dfoo" to expand
properly into
# " -Dfoo" when referenced.
#
#
# define the INCLUDE variable in Make's variable
symtab.
#
INCLUDE :=
#
# functions which do nothing but expand the variables
we want,
# but which could very easily do something more
useful, like
# expanding target/type-specific variables into a set
of compiler
# flags.
#
_EXPAND_DEFINES = ${DEFINES}
_EXPAND_INCLUDE = ${INCLUDE}
#
# this might be useful in a suffix rule.
#
_EXPAND_FLAGS = $(call _EXPAND_DEFINES) $(call
_EXPAND_INCLUDE)
#
# append to the variables for a given target.
#
# note: DEFINES not yet ... err ... defined.
#
foo: DEFINES += -Dfoo
bar: INCLUDE += -Ibar
#
# Place the rule that works first.
#
all: bar foo
#
# silly rule which causes _EXPAND_FLAGS to eventually
reference
# DEFINES and INCLUDE. one target works, the other
doesn't.
#
foo bar:
@echo "FLAGS($@): '$(call _EXPAND_FLAGS)'"
8<----- SNIP -----8<
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