I have one question: can I use 'include' instruction in a make file that is included by this instruction in an other make file. For example:
~/dir1/Makefile.inc:
#
# ~/dir1/Makefile.inc file body
ROOT=${HOME}
~/dir1/dir2/Makefile.inc:
#
# ~/dir1/dir2/Makefile.inc file body
include ../Makefile.inc
~/dir1/dir2/dir3/makefile:
#
# ~/dir1/dir2/dir3/makefile file body
include ../Makefile.inc
usage:
@ echo Root directory is ${ROOT}
when I launched make process in ~/dir/dir2/dir2 directory I got following messages:
../Makefile.inc:3: ../Makefile.inc: Too many open files
Root directory is
that means ROOT variable was not defined. Is there a defect of make or did I do any mistake ? Unfortunately I did not find any information about restriction of 'include' instruction usage in make documentation. Can anyone explain me this effect?
Thanks in advance.
-- Best regards, Kovalevich Victor mailto:[EMAIL PROTECTED]
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